Multilevel boost DC to DC converter circuit

Patent metadata

Field	Value
Publication number	US-10355591-B2
Application number	US-201715658667-A
Country	US
Kind code	B2
Filing date	Jul 25, 2017
Priority date	May 5, 2015
Publication date	Jul 16, 2019
Grant date	Jul 16, 2019

Abstract

Described examples include DC to DC converters and systems with switching circuitry formed by four series-connected switches, inductors connected between the ends of the switching circuitry and corresponding output nodes, and with a flying capacitor coupled across interior switches of the switching circuitry and a second capacitor coupled across the ends of the switching circuitry. A control circuit operates the switching circuit to control a voltage signal across the output nodes using a first clock signal and a phase shifted second clock signal to reduce output ripple current and enhance converter efficiency using valley current control. The output inductors are wound on a common core in certain examples.

First claim

The following is claimed:

1. A DC to DC converter circuit, comprising:
an input node to receive an input signal;
a switching circuit, including:
a first switch coupled between a first internal node and a second internal node,
a second switch coupled between the second internal node and the input node,
a third switch coupled between the input node and a third internal node, and
a fourth switch coupled between the third internal node and a fourth internal node;
a first capacitor coupled between the second and third internal nodes;
a second capacitor coupled between the first and fourth internal nodes;
a first inductor coupled between the first internal node and a first output node;
a second inductor coupled between the fourth internal node and a second output node; and
a control circuit adapted to generate switching control signals to operate the switching circuit to control an output voltage signal across the first and second output nodes to be greater than a voltage of the input signal at least partially according to a reference signal and a feedback signal, wherein the feedback signal is representative of a current entering the first inductor from the first internal node.

2. The DC to DC converter circuit of claim 1 , wherein the control circuit generates the switching control signals to control charging and discharging of the first capacitor.

3. The DC to DC converter circuit of claim 1 , wherein windings of the first inductor and windings of the second inductor are wound on a single shared core.

4. The DC to DC converter circuit of claim 1 , wherein the control circuit generates the switching control signals to implement current control at least partially according to an inductor current signal.

5. The DC to DC converter circuit of claim 4 , wherein the input node, the switching circuit, the first capacitor, the second capacitor, the first inductor, the second inductor, and the control circuit are formed in a single integrated circuit.

6. The DC to DC converter circuit of claim 1 , wherein the control circuit generates the switching control signals to control charging and discharging of the first capacitor.

7. The DC to DC converter circuit of claim 1 , wherein:
the feedback signal is a first feedback signal; and
the control circuit operates the switching circuit at least partially a second feedback signal, wherein the second feedback signal is representative of a voltage at the first output node.

8. A three-level Zeta boost converter system, comprising:
a switching circuit, including a first switch, a second switch, a third switch and a fourth switch connected in series, the second and third switches connected to one another at an input node to receive an input signal;
a first capacitor coupled in parallel across the second and third switches to provide a flying capacitor in the boost converter system;
a second capacitor coupled in parallel across the switching circuit, the second capacitor including first and second terminals;
the first switch being connected between the first terminal of the second capacitor and the second switch, wherein the connection between the first switch and the first terminal of the second capacitor is at a first internal node;
the fourth switch being connected between the second terminal of the second capacitor and the third switch;
a first inductor coupled between the first terminal of the second capacitor and a first output node;
a second inductor coupled between the second terminal of the second capacitor and a second output node;
a third capacitor coupled across the first and second output nodes; and
a control circuit adapted to operate the switching circuit to control an output voltage signal across the first and second output nodes to be greater than a voltage of the input signal at least partially according to a reference signal and a feedback signal, wherein the feedback signal is representative of a current entering the first inductor from the first internal node.

9. The system of claim 8 , wherein windings of the first inductor and windings of the second inductor are wound on a single shared core.

10. The DC to DC converter circuit of claim 8 , wherein:
the feedback signal is a first feedback signal; and
the control circuit operates the switching circuit at least partially a second feedback signal, wherein the second feedback signal is representative of a voltage at the first output node.

11. A DC to DC converter circuit, comprising:
an input node to receive an input signal;
first, second, third and fourth switches connected in series to form a switching circuit, the second and third switches connected to one another at the input node to receive an input signal;
a first capacitor coupled in parallel across the second and third switches to provide a flying capacitor in the boost converter system;
a second capacitor with a first terminal connected to the first switch, and a second terminal connected to the fourth switch;
the first switch being connected between the second switch and the first terminal of the second capacitor, wherein the connection between the first switch and the first terminal of the second capacitor is at a first internal node;
the fourth switch being connected between the third switch and the second terminal of the second capacitor;
an integrated inductor, including:
a core structure,
a first winding wound at least partially around the core structure to form a first inductor coupled between the first terminal of the second capacitor and a first output node, and
a second winding wound at least partially around the core structure to form a second inductor coupled between the second terminal of the second capacitor and a second output node; and
a control circuit adapted to generate switching control signals to operate the switching circuit to control an output voltage signal across the first and second output nodes to be greater than a voltage of the input signal at least partially according to a reference signal and a feedback signal, wherein the feedback signal is representative of a current entering the first inductor from the first internal node.

12. The DC to DC converter circuit of claim 11 , wherein the control circuit is operative to provide switching control signals to the first switch and the fourth switch at least partially according to a first clock signal, wherein the control circuit is operative to provide switching control signals to the second switch and the third switch at least partially according to a second clock signal; the control circuit including a phase shift circuit to generate the second clock signal phase shifted by approximately 180 degrees relative to the first clock signal.

13. The DC to DC converter circuit of claim 11 , wherein the control circuit provides the switching control signals to implement valley current control at least partially according to an inductor current signal.

14. The DC to DC converter circuit of claim 11 , wherein the control circuit generates the switching control signals to control charging and discharging of the first capacitor.

15. The DC to DC converter circuit of claim 11 , wherein:
the feedback signal is a first feedback signal; and
a control circuit to generate switching control signals to operate the switching circuit according to a second feedback signal, wherein the second feedback signal is representative of a voltage at the first output node.

Assignees

• Texas Instruments Inc

Inventors

• Granato Maurizio
• Frattini Giovanni
• Giannelli Pietro
• Lueders Michael
• Rott Christian

Classifications

• H02M3/33569

  having several active switching elements (H02M3/3353 takes precedence) · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• G05F1/565

  sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) · CPC title

• G05F1/595

  semiconductor devices connected in series · CPC title

• H02M2001/0003

  Electricity · mapped topic