Integrated circuit for managing wireless power transmitting devices

Patent metadata

Field	Value
Publication number	US-10355534-B2
Application number	US-201815963959-A
Country	US
Kind code	B2
Filing date	Apr 26, 2018
Priority date	Dec 12, 2016
Publication date	Jul 16, 2019
Grant date	Jul 16, 2019

Abstract

An example integrated circuit includes: (i) a processing subsystem configured to control operation of the integrated circuit, (ii) a waveform generator, operatively coupled to the processing subsystem, configured to generate radio frequency (RF) power transmission signals using an input current, (iii) a first digital interface that couples the integrated circuit with a plurality of power amplifiers that are external to the integrated circuit, and (iv) a second digital interface, distinct from the first digital interface, that couples the integrated circuit with a wireless communication component that is external to the integrated circuit. The processing subsystem is configured to: receive, via the second digital interface, an indication that a receiver is within transmission range of a transmitting device controlled by the circuit, and in response to receiving the indication: provide, via the first digital interface, the RF power transmission signals to at least one of the plurality of power amplifiers.

First claim

What is claimed is:

1. An integrated circuit for managing operations of a transmitting device, the integrated circuit comprising:
a processing subsystem that is configured to control operation of the integrated circuit;
a waveform generator, operatively coupled to the processing subsystem, configured to generate a plurality of radio frequency (RF) power transmission signals using an input signal;
a first digital interface that couples the integrated circuit with a plurality of power amplifiers that are external to the integrated circuit;
a second digital interface, distinct from the first digital interface, that couples the integrated circuit with a wireless communication component that is external to the integrated circuit; and
a third digital interface directly coupled to an antenna array of the transmitting device,
wherein the processing subsystem is further configured to:
receive, via the second digital interface, an indication that a wireless power receiver is within transmission range of the transmitting device controlled by the integrated circuit, and
in response to receiving the indication: provide, via the first digital interface, the plurality of RF power transmission signals to at least one of the plurality of power amplifiers.

2. The integrated circuit of claim 1 , wherein the integrated circuit further comprises an RF oscillator and an RF converter, and the waveform generator uses the RF oscillator and the RF converter to generate the plurality of RF power transmission signals.

3. The integrated circuit of claim 2 , wherein:
the RF oscillator is configured to generate the plurality of RF power transmission signals at a desired frequency based on instructions from the processing subsystem; and
the RF converter is configured to convert, amplify, and/or modulate the plurality of RF power transmission signals.

4. The integrated circuit of claim 2 , wherein:
the processing subsystem further comprises a secure element; and
the secure element is configured to authenticate the wireless power receiver based on communication signals from the wireless power receiver received by the wireless communication component.

5. The integrated circuit of claim 4 , wherein the wireless communication component is a communication interface that is configured to receive the communication signals from the wireless power receiver.

6. The integrated circuit of claim 5 , wherein the communication interface is a short-range radio.

7. The integrated circuit of claim 6 , wherein the short-range radio is a Bluetooth radio.

8. The integrated circuit of claim 4 , further comprising a serial interface, distinct from the first and second digital interfaces, that couples the integrated circuit with external memory.

9. The integrated circuit of claim 8 , wherein the serial interface is an inter-integrated circuit (I 2 C) port.

10. The integrated circuit of claim 9 , wherein the external memory is non-volatile memory.

11. The integrated circuit of claim 8 , further comprising a fourth interface, distinct from the first digital interface, the second digital interface, the third digital interface, and the serial interface, configured to control operation of one or more external devices.

12. The integrated circuit of claim 11 , wherein the fourth interface is a Serial Peripheral Interface (SPI) bus.

13. The integrated circuit of claim 11 , further comprising a power detector configured to determine an amount of power reflected at the transmitting device while one or more antennas of the antenna array transmit the plurality of RF power transmission signals, wherein the amount of power reflected is received through the third digital interface.

14. The integrated circuit of claim 11 , wherein the processing subsystem includes a central processing unit (CPU), read-only memory (ROM), and random-access memory (RAM).

15. The integrated circuit of claim 13 , further comprising a data bus operatively coupled to at least the processing subsystem, the waveform generator, the first digital interface, the second digital interface, and the power detector.

16. The integrated circuit of claim 15 , wherein the data bus is an interconnection fabric block.

17. The integrated circuit of claim 1 , further comprising a DC-DC power converter.

18. The integrated circuit of claim 1 , wherein:
the at least one power amplifier of the plurality of power amplifiers is coupled to at least one antenna of the antenna array; and
the at least one antenna is configured to radiate at least one of the plurality of RF power transmission signals provided by the at least one power amplifier.

19. The integrated circuit of claim 1 , wherein the third digital interface is configured to control operation of at least some antennas included in the antenna array.

20. A radio-frequency (RF) transmitting device comprising:
an antenna array;
a plurality of power amplifiers, each respectively coupled to one or more antennas of the antenna array; and
an integrated circuit coupled to the plurality of power amplifiers, the integrated circuit comprising:
a processing subsystem that is configured to control operation of the integrated circuit;
a waveform generator, operatively coupled to the processing subsystem, configured to generate a plurality of RF power transmission signals using an input current;
a first digital interface that couples the integrated circuit with the plurality of power amplifiers, the plurality of power amplifiers being external to the integrated circuit;
a second digital interface, distinct from the first digital interface, that couples the integrated circuit with a wireless communication component that is external to the integrated circuit; and
a third digital interface directly coupled to the antenna array,

wherein the processing subsystem is further configured to:
receive, via the second digital interface, an indication that a wireless power receiver is within transmission range of the RF transmitting device controlled by the integrated circuit, and
in response to receiving the indication: provide, via the first digital interface, the plurality of RF power transmission signals to at least one of the plurality of power amplifiers.

Assignees

• Energous Corp

Inventors

• Johnston Cesar
• Bosso Brian

Classifications

• H02J50/40

  using two or more transmitting or receiving devices (H02J50/50 takes precedence) · CPC title

• H02J7/70 Primary

  characterised by the mechanical construction · CPC title

• H02J50/23

  characterised by the type of transmitting antennas, e.g. directional array antennas or Yagi antennas · CPC title

• H04W4/80

  Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication · CPC title

• Y02B40/90

  Cross-Sectional Technologies · mapped topic