Microstructured substrate

US10355302B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10355302-B2
Application numberUS-201415027065-A
CountryUS
Kind codeB2
Filing dateOct 2, 2014
Priority dateOct 7, 2013
Publication dateJul 16, 2019
Grant dateJul 16, 2019

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  5. First independent claim

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Abstract

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A microstructured substrate includes a plurality of at least one elementary microstructure. An electrical storage device, and more particularly an all-solid-state battery, can include the microstructured substrate.

First claim

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The invention claimed is: 1. A microstructured substrate comprising: a plurality of at least one elementary microstructure, wherein said at least one elementary microstructure, on the one hand, has an elongated shape having a longitudinal dimension (d L ) and lower and upper opposite longitudinal ends, the lower end being connected to a surface of a substrate and, on the other hand, includes an open cavity at its upper end, said open cavity having a longitudinal dimension (d in ) and extending longitudinally inside said at least one elementary microstructure, said at least one elementary microstructure has an external face that delimits the exterior outline of said at least one elementary microstructure and an internal face that delimits said cavity, said microstructured substrate having a conformal layer of alumina deposited directly on the surface of the substrate located at the exterior outline of said at least one microstructure, on the external face of said at least one elementary microstructure and on the internal face of said cavity, wherein the longitudinal dimension (d in ) of the open cavity is substantially equal to half the longitudinal dimension (d L ) of said at least one elementary microstructure. 2. The microstructured substrate according to claim 1 , wherein said at least one elementary microstructure has a circular, elliptical, rectangular, square or triangular transverse cross section. 3. The microstructured substrate according to claim 1 , wherein said at least one elementary microstructure has a longitudinal dimension (d L ) between 5 and 200 μm and a transverse dimension (OD) between 2 and 10 μm. 4. The microstructured substrate according claim 1 , wherein said at least one elementary microstructures of the substrate are arranged periodically over said substrate. 5. The microstructured substrate according to claim 4 , wherein said at least one elementary microstructures of the substrate have a spatial period (SP) between 3 and 10 μm. 6. The microstructured substrate according to claim 1 , wherein said at least one elementary microstructure has an aspect ratio (r asp ) higher than or equal to 10. 7. The microstructured substrate according to claim 1 , wherein said substrate is made from a material chosen from silicon, silicon dioxide, gallium arsenide, silicon nitride and indium phosphide. 8. A process for obtaining a microstructured substrate according to claim 1 by microstructuring a substrate having a planar surface, said process comprising the steps of: a) coating a photoresist layer onto the planar surface of said substrate, b) producing by photolithography a repetition of at least one elementary pattern in the photoresist layer in order that the surface of the substrate presents zones exempt from photoresist, said at least one elementary pattern having an elongated shape having a longitudinal dimension (d L ) and a lower and an upper opposite longitudinal ends, the lower end being connected to the surface of the substrate and, on the other hand, includes an open cavity having a longitudinal dimension (d in ) at its upper end, the longitudinal dimension (d in ) of said open cavity being substantially equal to half the longitudinal dimension (d L ) of said at least one elementary pattern, said at least one elementary pattern has an external face that delimits the exterior outline of said at least one elementary pattern and an internal face that delimits said cavity, c) etching the zones of the surface of the substrate exempt from photoresist, d) passivating the surface of the substrate, e) repeating said etching and passivating steps c) and d), and f) depositing a conformal layer of alumina directly on the surface of the surface of the substrate located at the exterior outline of said at least one elementary pattern, on the external face of said at least one elementary pattern and on the internal face of said cavity. 9. The process according to claim 8 , wherein said at least one elementary pattern obtained in the photolithography step b) has an annular shape presenting transverse dimensions comprised between 2 to 10 μm. 10. The process according to claim 8 , wherein the etching and passivating steps c) and d) are carried out by way of an ionized gas. 11. The microstructured substrate as defined in claim 1 , wherein said microstructured substrate is configured for application within a device for storing electrical energy. 12. A device for storing electrical energy having a microstructured substrate according to claim 1 , said device comprising: a substrate, a negative electrode and a positive electrode, one of which is placed on the substrate, and an electrolyte placed between the negative electrode and the positive electrode. 13. The device according to claim 12 , wherein said device further comprises a first current collector placed on the substrate and a second current collector, the negative electrode and the positive electrode being placed between the first and second current collectors. 14. The device according to claim 13 , wherein the substrate is made from a material chosen from silicon, silicon dioxide, gallium arsenide, silicon nitride and indium phosphide, wherein the first and second current collectors are each made from solid materials chosen from aluminium, copper, platinum and titanium nitride. 15. The device for storing electrical energy according to claim 12 , wherein the negative electrode, the positive electrode and the electrolyte are each formed as a layer having a thickness between 15 nm and 200 nm.

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What does patent US10355302B2 cover?
A microstructured substrate includes a plurality of at least one elementary microstructure. An electrical storage device, and more particularly an all-solid-state battery, can include the microstructured substrate.
Who is the assignee on this patent?
Centre Nat Rech Scient, Univ Nantes
What technology area does this patent fall under?
Primary CPC classification H01M10/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 16 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).