Semiconductor device

Patent metadata

Field	Value
Publication number	US-10355019-B1
Application number	US-201816024906-A
Country	US
Kind code	B1
Filing date	Jul 1, 2018
Priority date	Jun 1, 2018
Publication date	Jul 16, 2019
Grant date	Jul 16, 2019

Abstract

A semiconductor device includes a substrate, a first transistor, a first diode structure, and a second diode structure. The first transistor is disposed on the substrate. The first transistor includes a first gate electrode, a first source electrode, and a first drain electrode. The first gate electrode is connected to the substrate by the first diode structure. The first drain electrode is connected to the substrate by the second diode structure. The first diode structure and the second diode structure may be used to improve potential unbalance in the transistor, and operation performance and reliability of the semiconductor device may be enhanced accordingly.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate;
a first transistor disposed on the substrate, wherein the first transistor comprises a first gate electrode, a first source electrode, and a first drain electrode;
a first diode structure, wherein the first gate electrode is connected to the substrate by the first diode structure;
a second diode structure, wherein the first drain electrode is connected to the substrate by the second diode structure; and
a third diode structure, wherein the first source electrode is connected to the substrate by the third diode structure.

2. The semiconductor device according to claim 1 , wherein the first diode structure comprises two diodes facing each other.

3. The semiconductor device according to claim 1 , wherein the second diode structure comprises two diodes facing each other.

4. The semiconductor device according to claim 1 , wherein the first diode structure and the second diode structure are separated from each other.

5. The semiconductor device according to claim 1 , further comprising:
an interconnection structure disposed between the first transistor and the substrate; and
a second transistor disposed between the interconnection structure and the substrate.

6. The semiconductor device according to claim 5 , wherein the first diode structure and the second diode structure are disposed in the substrate.

7. The semiconductor device according to claim 6 , wherein the first diode structure is connected with the first gate electrode by the interconnection structure, and the second diode structure is connected with the first drain electrode by the interconnection structure.

8. The semiconductor device according to claim 6 , wherein the second diode structure comprises:
a well having a first conductivity type; and
a doped region disposed in the well, wherein the doped region and the substrate have a second conductivity type complementary to the first conductivity type.

9. The semiconductor device according to claim 1 , wherein the first transistor comprises an oxide semiconductor transistor, an amorphous silicon semiconductor transistor, or a polysilicon semiconductor transistor.

10. The semiconductor device according to claim 1 , wherein the third diode structure comprises two diodes facing each other.

11. The semiconductor device according to claim 1 , wherein the first diode structure, the second diode structure, and the third diode structure are separated from one another.

12. The semiconductor device according to claim 1 , further comprising:
an interconnection structure disposed between the first transistor and the substrate.

13. The semiconductor device according to claim 12 , wherein the third diode structure is disposed in the substrate.

14. The semiconductor device according to claim 13 , wherein the third diode structure is connected with the first source electrode by the interconnection structure.

15. The semiconductor device according to claim 13 , wherein the third diode structure comprises:
a well having a first conductivity type; and
a doped region disposed in the well, wherein the doped region and the substrate have a second conductivity type complementary to the first conductivity type.

Assignees

• United Microelectronics Corp

Inventors

• Li Xiang
• Chen Ding-Lung
• Tung Yu-Cheng

Classifications

• H10W20/427

  Power or ground buses · CPC title

• H01L29/78675

  Electricity · mapped topic

• H01L27/0629

  Electricity · mapped topic

• H01L29/7869

  Electricity · mapped topic

• H01L29/78666

  Electricity · mapped topic