Capacitance Determining Circuit and Fingerprint Recognition System
US-2018060637-A1 · Mar 1, 2018 · US
US10354119B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10354119-B2 |
| Application number | US-201615509279-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 21, 2016 |
| Priority date | Oct 28, 2015 |
| Publication date | Jul 16, 2019 |
| Grant date | Jul 16, 2019 |
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A pixel module and a fingerprint identification system are provided. The pixel module includes: a top-layer electrode, configured to receive a contact of a finger, a contact capacitance being formed between the top-layer electrode and the finger; a pixel circuit, configured to detect a capacitance value of the contact capacitance; and a resistor, coupled between the top-layer electrode and the pixel circuit. The pixel module suppresses the electrostatic current formed by the electrostatic charges, thereby achieving the effect of electrostatic protection.
Opening claim text (preview).
What is claimed is: 1. A fingerprint identification system, comprising a plurality of pixel modules, wherein each pixel module has an electrostatic protection function and comprises: a top-layer electrode, configured to receive a contact of a finger, a contact capacitance being formed between the top-layer electrode and the finger; a pixel circuit, configured to detect a capacitance value of the contact capacitance; a resistor, coupled between the top-layer electrode and the pixel circuit, wherein the resistor is configured to suppress an electrostatic current between the top-layer electrode and the pixel circuit; and a fingerprint judging module, coupled to the plurality of pixel modules, and configured to judge whether each pixel module corresponds to a finger ridge or a finger valley. 2. The fingerprint identification system according to claim 1 , wherein the resistor has a resistance higher than 10 ohms. 3. The fingerprint identification system according to claim 1 , wherein the resistor is formed of a polycrystalline silicon layer in a n integrated chip process. 4. The fingerprint identification system according to claim 1 , wherein the pixel circuit is arranged below the top-layer electrode, and the pixel circuit has an area that is less than or equal to the area of the top-layer electrode.
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
non-optical, e.g. ultrasonic or capacitive sensing · CPC title
Protecting the fingerprint sensor against damage caused by the finger · CPC title
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