Prioritization of transactions based on execution by transactional core with super core indicator

Patent metadata

Field	Value
Publication number	US-10353734-B2
Application number	US-201615277770-A
Country	US
Kind code	B2
Filing date	Sep 27, 2016
Priority date	Jan 29, 2016
Publication date	Jul 16, 2019
Grant date	Jul 16, 2019

Abstract

A method, system, and computer program product are provided for prioritizing transactions. A processor in a computing environment initiates the execution of a transaction. The processor includes a transactional core, and the execution of the transaction is performed by the transactional core. The processor obtains concurrent with the execution of the transaction by the transactional core, an indication of a conflict between the transaction and at least one other transaction being executed by an additional core in the computing environment. The processor determines if the transactional core includes an indicator and based on determining that the transactional core includes an indicator, the processor ignores the conflict and utilizing the transactional core to complete executing the transaction.

First claim

What is claimed is:

1. A computer-implemented method comprising:
initiating, by a processor, in a computing environment, an execution of a transaction, wherein the processor comprises a transactional core, and wherein the execution of the transaction is performed by the transactional core;
obtaining, by the processor, concurrent with the execution of the transaction by the transactional core, an indication of a conflict between the transaction and at least one other transaction being executed by an additional transactional core in the computing environment, wherein the conflict is based on a request by the additional transactional core to the transactional core for data located in a cache of the transactional core during the execution;
determining, by the processor, concurrent with executing the transaction, if the transactional core comprises an indicator, wherein the indicator is a super core indicator, and wherein the indicator is set for the transactional core when a value associated with the transactional core is greater than or equal to a threshold; wherein the value indicates a number of times the transaction has failed;
based on determining that the transactional core comprises the indicator, ignoring, by the transactional core, the conflict and utilizing, by the processor, the transactional core to complete executing the transaction; and
based on determining that the transactional core does not comprise the indicator, aborting, by the processor, the transaction performed by the transactional core.

2. The computer-implemented method of claim 1 , wherein the data is located in the cache is marked as read data or write data.

3. The computer-implemented method of claim 1 , wherein the ignoring further comprises:
denying, by the processor, the additional core access to the data.

4. The computer-implemented method of claim 1 , further comprising:
queuing, by the processor, the request; and
based on completing execution of the transaction, fulfilling, by the processor, the request, by providing access to the data to the additional transactional core.

5. The computer-implemented method of claim 1 , further comprising:
monitoring, by the processor, the executing of the transaction by the transactional core; and
based on the transactional core completing the executing by committing the transaction, clearing, by the processor, the indicator.

6. The computer-implemented method of claim 1 , further comprising:
obtaining, by the processor, a request from the transactional core for the indicator;
determining, by the processor, if a super core status is available; and
based on determining that a super core status is available, modifying, by the processor, the transactional core, to comprise the indicator.

7. The computer-implemented method of claim 1 , further comprising:
based on determining that the transactional core does not comprise the indicator, incrementing, by the processor, the value associated with the transactional core, wherein the value is a number larger than one.

8. The computer-implemented method of claim 7 , further comprising:
obtaining, by the processor, the value associated with the transaction;
evaluating, by the processor, the value to determine if the value meets a value threshold;
based on determining that the value meets the value threshold, requesting, by the processor, an indicator for the transactional core;
determining, by the processor, that a super core status is available; and
based on determining, modifying, by the processor, the transactional core, to comprise the indicator.

9. The computer-implemented method of claim 8 , wherein the determining if the super core status is available comprises:
accessing, by the processor, transactional cores in the computing environment to determine if a threshold number of transactional cores comprise indicators; and
determining, by the processor, that the super core status is available based on less than the threshold number of transactional cores comprising indicators.

Assignees

• IBM

Inventors

• Busaba Fadi Y
• Cain Iii Harold W
• Gschwind Michael K
• Salapura Valentina
• Schwarz Eric M
• Slegel Timothy J

Classifications

• G06F9/466 Primary

  Transaction processing · CPC title

• G06F2212/152

  Virtualized environment, e.g. logically partitioned system · CPC title

• G06F9/467

  Transactional memory (G06F9/528 takes precedence) · CPC title

• G06F9/3004

  to perform operations on memory · CPC title

• G06F2212/1052

  Security improvement · CPC title