Differential IIR baseline algorithm for capacitive touch sensing

Patent metadata

Field	Value
Publication number	US-10353517-B2
Application number	US-201615071084-A
Country	US
Kind code	B2
Filing date	Mar 15, 2016
Priority date	Mar 16, 2015
Publication date	Jul 16, 2019
Grant date	Jul 16, 2019

Abstract

A method of processing raw response signals for capacitive sense arrays is performed at an electronic device having one or more processors and a capacitive sense array. The process receives a raw response signal from the capacitive sense array. The process computes an offset signal that represents an average baseline value of the raw response signal over a period of time and filters the raw response signal to a limited frequency band, thereby forming a bandwidth limited signal. The process also computes a differential signal as the difference between the offset signal and the bandwidth limited signal and uses the differential signal to detect an object proximate to the capacitive sense array.

First claim

What is claimed is:

1. A method of processing raw response signals for capacitive sense arrays, comprising:
at an electronic device having one or more processors and a capacitive sense array:
receiving a raw response signal from the capacitive sense array;
computing, from the raw response signal, an offset signal that represents a continuous average baseline value of the raw response signal over a period of time;
while computing the offset signal from the raw response signal, concurrently filtering the raw response signal to a limited frequency band, thereby forming a bandwidth limited signal;
computing a differential signal as a difference between the offset signal and the bandwidth limited signal that are concurrently generated from the raw response signal; and
using the differential signal to detect an object proximate to the capacitive sense array.

2. The method of claim 1 , further comprising applying a common noise detector to the differential signal to identify a noise signal.

3. The method of claim 2 , further comprising subtracting the noise signal from the differential signal to form an output signal.

4. The method of claim 1 , further comprising adjusting a speed of the offset signal computation and a speed of the response signal filtering in accordance with a determination that the raw response signal crosses a threshold value at a first time.

5. The method of claim 4 , wherein adjusting a speed of the offset signal computation and a speed of the response signal filtering comprises increasing the speed of the offset signal computation and decreasing the speed of the response signal filtering.

6. The method of claim 5 , further comprising decreasing the speed of the offset signal computation and increasing the speed of the response signal filtering at a second time subsequent to the first time.

7. A system comprising:
a capacitive sense array configured to generate a raw response signal;
an offset signal computing circuit configured to compute, from the raw response signal, an offset signal representing an average baseline value of the raw response signal over a period of time;
a filtering circuit configured to, while computing the offset signal from the raw response signal, concurrently filter the raw response signal to a limited frequency band, thereby forming a bandwidth limited signal;
a differential circuit for computing a differential signal as the difference between the offset signal and the bandwidth limited signal that are concurrently generated from the raw response signal; and
a processing device that uses the differential signal to detect an object proximate to the capacitive sense array.

8. The system of claim 7 , further comprising a common noise detector that uses the differential signal to identify a noise signal.

9. The system of claim 8 , wherein the processing device is configured to subtract the noise signal from the differential signal to form an output signal.

10. The system of claim 7 , further comprising control circuitry to adjust a speed of the offset signal computation and a speed of the response signal filtering in accordance with a determination that the raw response signal crosses a threshold value at a first time.

11. The system of claim 10 , wherein the control circuitry is configured to generate control signals for the offset signal computing circuit and the filtering circuit to increase the speed of the offset signal computation and decrease the speed of the response signal filtering when the raw response signal crosses the threshold value at the first time.

12. The system of claim 11 , wherein the control circuitry is configured to generate control signals for the offset signal computing circuit and the filtering circuit to decrease the speed of the offset signal computation and increase the speed of the response signal filtering at a second time subsequent to the first time.

13. A non-transitory computer readable storage medium, storing one or more programs configured for execution by one or more processors of a sensing system having a capacitive sense array, the one or more programs including instructions for:
receiving a raw response signal from the capacitive sense array;
computing, from the raw response signal, an offset signal that represents a continuous average baseline value of the raw response signal over a period of time;
while computing the offset signal from the raw response signal, concurrently filtering the raw response signal to a limited frequency band, thereby forming a bandwidth limited signal;
computing a differential signal as a difference between the offset signal and the bandwidth limited signal that are concurrently generated from the raw response signal; and
using the differential signal to detect an object proximate to the capacitive sense array.

14. The computer readable storage medium of claim 13 , wherein the one or more programs further comprise instructions for applying a common noise detector to the differential signal to identify a noise signal.

15. The computer readable storage medium of claim 14 , wherein the one or more programs further comprise instructions for subtracting the noise signal from the differential signal to form an output signal.

16. The computer readable storage medium of claim 13 , wherein the one or more programs further comprise instructions for adjusting a speed of the offset signal computation and a speed of the response signal filtering in accordance with a determination that the raw response signal crosses a threshold value at a first time.

17. The computer readable storage medium of claim 16 , wherein adjusting a speed of the offset signal computation and a speed of the response signal filtering comprises increasing the speed of the offset signal computation and decreasing the speed of the response signal filtering.

18. The computer readable storage medium of claim 17 , wherein the one or more programs further comprise instructions for decreasing the speed of the offset signal computation and increasing the speed of the response signal filtering at a second time subsequent to the first time.

19. The method of claim 1 , wherein at each instant of time, the offset signal is a weighted combination of past sampled information of the raw response signal and present sampled information of the raw response signal.

20. The method of claim 19 , wherein the offset signal is a combination of 50% of the past sampled information of the raw response signal and 50% of the present sampled information of the raw response signal.

Assignees

• Parade Tech Ltd

Inventors

• Fosler Ross Martin

Classifications

• G06F3/0418 Primary

  for error correction or compensation, e.g. based on parallax, calibration or alignment · CPC title

• G06F3/044

  by capacitive means · CPC title

• G06F3/0446

  using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

• G06F3/04182 Primary

  Filtering of noise external to the device and not generated by digitiser components · CPC title