Liquid crystal display device and display device

US10353259B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10353259-B2
Application numberUS-201715679913-A
CountryUS
Kind codeB2
Filing dateAug 17, 2017
Priority dateSep 9, 2014
Publication dateJul 16, 2019
Grant dateJul 16, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

According to one embodiment, a liquid crystal display device includes a first substrate including a semiconductor layer including a first extension portion and a second extension portion, a gate line, a first common electrode opposed to at least the second extension portion, a source line extending above the second extension portion, a pixel electrode including a main pixel electrode, a second common electrode including a second main common electrode opposed to the source line, and a first alignment film.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a first substrate including a first insulation substrate, a polycrystalline silicon layer, a gate line extending in a first direction, a source line extending in a second direction, a transparent conductive layer formed of indium tin oxide (ITO) or indium zinc oxide (IZO), a first insulation film, and a second insulation film, a third insulation film, and a plurality of pixel electrodes which are arrayed in a matrix in an active area, wherein the polycrystalline silicon layer is disposed on the first insulation substrate and is directly covered by a bottom surface of the third insulation film, the gate line is disposed on a top surface of the third insulation film, the transparent conductive layer is sandwiched between a top surface of the first insulation film and a bottom surface of the second insulation film, a bottom surface of the first insulation film directly covers the gate line, the source line is directly disposed on a top surface of the second insulation film, and the polycrystalline silicon layer is electrically connected to one of the plurality of pixel electrodes via an opening portion of the transparent conductive layer. 2. The display device according to claim 1 , wherein the transparent conductive layer is opposed to the plurality of pixel electrodes. 3. The display device according to claim 1 , wherein the transparent conductive layer is opposed to the gate line and the source line. 4. The display device according to claim 2 , wherein the transparent conductive layer is opposed to the gate line and the source line. 5. The display device according to claim 4 , wherein the transparent conductive layer has a common potential. 6. The display device according to claim 1 , wherein the first substrate further includes a drain electrode disposed on the top surface of the second insulation film, and the drain electrode is opposed to the opening portion of the transparent conductive layer. 7. The display device according to claim 6 , wherein the first substrate further includes a metal wiring extending on the top surface of the third insulation film in the first direction, and the metal wiring is opposed to the transparent conductive layer. 8. The display device according to claim 6 , wherein the first substrate further includes a common line extending in the second direction, and the common line is opposed to the source line and electrically connected to the transparent conductive layer. 9. The display device according to claim 8 , wherein the first substrate further includes a fourth insulation film, a bottom surface of the fourth insulation film directly covers the source line, and the common line is disposed on a top surface of the fourth insulation film. 10. The display device according to claim 7 , wherein the first substrate further includes a common line extending in the first direction, and the common line is opposed to the metal wiring and electrically connected to the transparent conductive layer. 11. The display device according to claim 10 , wherein the first substrate further includes a fourth insulation film, a bottom surface of the fourth insulation film directly covers the source line, and the common line is disposed on a top surface of the fourth insulation film. 12. The display device according to claim 1 , wherein the source line includes a source electrode, the polycrystalline silicon layer is opposed to the source electrode via an opening portion of the transparent conductive layer. 13. The display device according to claim 1 , wherein the first insulation film and the second insulation film are formed of an inorganic material. 14. The display device according to claim 1 , wherein the first, second, and third insulation films are formed of an inorganic material. 15. The display device according to claim 8 , wherein the source line is disposed between the common line and the transparent conductive layer. 16. The display device according to claim 10 , wherein the transparent conductive layer is disposed between the common line and the gate line.

Assignees

Inventors

Classifications

  • Physics · mapped topic

  • Liquid crystal cells structurally associated with a photoconducting or a ferro-electric layer, the properties of which can be optically or electrically varied {(G02F1/133348 takes precedence)} · CPC title

  • Physics · mapped topic

  • Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers · CPC title

  • Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence) · CPC title

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What does patent US10353259B2 cover?
According to one embodiment, a liquid crystal display device includes a first substrate including a semiconductor layer including a first extension portion and a second extension portion, a gate line, a first common electrode opposed to at least the second extension portion, a source line extending above the second extension portion, a pixel electrode including a main pixel electrode, a second …
Who is the assignee on this patent?
Japan Display Inc
What technology area does this patent fall under?
Primary CPC classification G02F1/136286. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 16 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).