Substrate comprising an electrical circuit pattern, method and system for providing same

US10349525B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10349525-B2
Application numberUS-201415032929-A
CountryUS
Kind codeB2
Filing dateOct 29, 2014
Priority dateOct 30, 2013
Publication dateJul 9, 2019
Grant dateJul 9, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure concerns an electrical circuit pattern on a substrate, as well as a method and system for forming same. In a typical embodiment, a light pattern is projected through a transparent layer to cause a patterned release of adhesion between a continuous material layer and the transparent layer. A release layer adhered to the patterned material layer is pulled off the substrate to separate the material having lower adhesion while leaving the material that was not exposed to form the electrical circuit pattern thereon.

First claim

Opening claim text (preview).

The invention claimed is: 1. Method for forming an electrical circuit pattern on a substrate, the method comprising providing a stack comprising a continuous material layer adhered between a release layer on one side and a transparent layer on the other side, wherein the continuous material layer is a homogeneous layer of a metal or a semiconductor material; providing a light source projecting light onto the stack from the side of the transparent layer; and providing a mask between the light source and the stack to form a light pattern in the light projected from the light source onto the stack, wherein the light pattern is projected through the transparent layer to cause a patterned release of adhesion between the continuous material layer and the transparent layer at locations matching the light pattern. 2. Method according to claim 1 , further comprising separating the release layer from the transparent layer, wherein a pattern formed in the continuous material layer adheres to the transparent layer at locations where adhesion between the continuous material layer and the transparent layer was not released by the light pattern, and a reciprocal pattern formed in the continuous material layer adheres to the release layer at locations where adhesion between the continuous material layer and the transparent layer was released by the light pattern. 3. Method according to claim 2 , wherein the electrical circuit pattern is the pattern formed in the continuous material layer that adheres to the transparent layer. 4. Method according to claim 2 , wherein the pattern formed in the continuous material layer comprises conductive tracks of the electrical circuit pattern. 5. Method according to claim 1 , wherein the mask comprises an image of the electrical circuit pattern. 6. Method according to claim 1 , wherein the stack further comprises an intermediate adhesion layer between the transparent layer and the continuous material layer. 7. Method according to claim 6 , wherein the patterned release of adhesion between the continuous material layer and the transparent layer is caused by a selective reaction of the intermediate adhesion layer. 8. Method according to claim 6 , wherein the continuous material layer does not react to the projected light. 9. Method according to claim 1 , wherein the light pattern projected through the transparent material of the stack causes the continuous material layer to indirectly heat the transparent material or an adjacent transparent layer, to cause the patterned release of adhesion. 10. Method according to claim 1 , wherein the light source comprises a flash lamp. 11. The method of claim 1 , wherein the continuous material layer is a homogeneous metal layer. 12. A method for forming an electrical circuit pattern on a substrate, the method comprising providing a stack comprising a continuous material layer adhered between a release layer on one side and a transparent layer on the other side, wherein the continuous material layer is a continuous metal layer or continuous semiconductor material layer; providing a light source projecting light onto the stack from the side of the transparent layer; and providing a mask between the light source and the stack to form a light pattern in the light projected from the light source onto the stack, wherein the light pattern is projected through the transparent layer to cause a patterned release of adhesion of the continuous material layer from the transparent layer at locations matching the light pattern, wherein the patterned release of adhesion of the continuous material layer from the transparent layer is caused by a selective reaction, at the locations matching the light pattern, of an adhesion layer. 13. The method of claim 12 , wherein the selective reaction is a selective decomposition of the adhesion layer. 14. The method of claim 12 , wherein the adhesion layer is part of the transparent layer. 15. The method of claim 12 , wherein the adhesion layer is a separate layer between the transparent layer and the continuous layer. 16. The method of claim 12 , further comprising separating the release layer from the transparent layer, to cause separation of the continuous material layer into the electrical circuit pattern and a reciprocal pattern. 17. The method of claim 12 , wherein the light projected from the light source does not cause a reaction of the continuous material layer. 18. A method for forming an electrical circuit pattern on a substrate, the method comprising providing a stack comprising a continuous material layer adhered between a release layer on one side and a transparent layer on the other side, wherein the continuous material layer comprises a conductor or semiconductor material; providing a light source projecting light onto the stack from the side of the transparent layer; and providing a mask between the light source and the stack to form a light pattern in the light projected from the light source onto the stack, wherein the light pattern is projected through the transparent layer to cause a patterned release of adhesion between the continuous material layer and the transparent layer at locations matching the light pattern, wherein the light projected from the light source does not cause a reaction of the continuous material layer and wherein the patterned release of adhesion causes, upon separating the release layer from the transparent layer, separation of the continuous material layer into the electrical circuit pattern, said electrical circuit pattern being formed of conductive tracks of the continuous material layer. 19. The method of claim 18 , wherein the patterned release of adhesion between the continuous material layer and the transparent layer is caused by a selective reaction, at the locations matching the light pattern, of an adhesion layer. 20. The method of claim 19 , wherein the adhesion layer is a separate layer between the transparent layer and the continuous layer.

Assignees

Inventors

Classifications

  • Transparent · CPC title

  • characterised by the exposure method of radiation-sensitive masks · CPC title

  • Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295 (H05K1/11 takes precedence; lay-out adapted to mounted component configuration H05K1/18) · CPC title

  • for patterning or coating · CPC title

  • by exposure to radiation (B05D3/02 takes precedence {; plasma treatment B05D3/141}) · CPC title

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What does patent US10349525B2 cover?
The present disclosure concerns an electrical circuit pattern on a substrate, as well as a method and system for forming same. In a typical embodiment, a light pattern is projected through a transparent layer to cause a patterned release of adhesion between a continuous material layer and the transparent layer. A release layer adhered to the patterned material layer is pulled off the substrate …
Who is the assignee on this patent?
TNO
What technology area does this patent fall under?
Primary CPC classification H05K3/027. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 09 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).