Synchronization mechanism for high speed sensor interface

Patent metadata

Field	Value
Publication number	US-10348430-B2
Application number	US-201715692974-A
Country	US
Kind code	B2
Filing date	Aug 31, 2017
Priority date	Jan 10, 2017
Publication date	Jul 9, 2019
Grant date	Jul 9, 2019

Abstract

A sensor may determine a sampling pattern based on a group of synchronization signals received by the sensor. The sampling pattern may identify an expected time for receiving an upcoming synchronization signal. The sensor may trigger, based on the sampling pattern, a performance of a sensor operation associated with the upcoming synchronization signal. The performance of the sensor operation may be triggered before the upcoming synchronization signal is received.

First claim

What is claimed is:

1. A sensor, comprising:
one or more components to:
determine a sampling pattern based on a group of synchronization signals received by the sensor,
wherein the sampling pattern identifies an expected time for receiving an upcoming synchronization signal; and

trigger, based on the sampling pattern, a performance of a sensor operation associated with the upcoming synchronization signal,
wherein the performance of the sensor operation is triggered before the upcoming synchronization signal is received.

2. The sensor of claim 1 , wherein the one or more components are further to:
receive the upcoming synchronization signal; and
transmit sensor data, resulting from the performance of the sensor operation, based on receiving the upcoming synchronization signal.

3. The sensor of claim 2 , wherein the sensor data includes information that identifies a counter value corresponding to an actual time buffer associated with the upcoming synchronization signal.

4. The sensor of claim 2 , wherein the one or more components, when transmitting the sensor data, are to:
transmit the sensor data during a period of time that at least partially overlaps with a period of time during which a performance of a sensor operation, associated with another upcoming synchronization signal, is triggered.

5. The sensor of claim 1 , wherein the one or more components are further to:
transmit sensor data, associated with a received synchronization signal, during a time period that at least partially overlaps a time period during which the performance of the sensor operation, associated with the upcoming synchronization signal, is triggered.

6. The sensor of claim 1 , wherein the one or more components, when determining the sampling pattern, are to:
determine the sampling pattern based on a time difference between a time at which a first synchronization signal is received and a time at which a second synchronization signal is received,
wherein the first synchronization signal and the second synchronization signal are included in the group of synchronization signals.

7. The sensor of claim 1 , wherein the one or more components, when triggering the sensor operation, associated with the upcoming synchronization signal, are to:
trigger the performance of the sensor operation based on a delay time that causes the sensor to wait, after receiving a previous synchronization signal, before triggering the performance of the sensor operation.

8. The sensor of claim 1 , wherein the one or more components are further to:
receive the upcoming synchronization signal;
determine an actual time buffer based on receiving the upcoming synchronization signal; and
selectively adjust a delay time, associated with triggering a sensor operation associated with another upcoming synchronization signal, based on whether the actual time buffer matches a target time buffer associated with the upcoming synchronization signal.

9. The sensor of claim 1 , wherein the sensor operation is an operation associated with sampling a sensor signal.

10. A system, comprising:
a sensor to:
determine a sampling pattern based on a group of synchronization signals received by the sensor,
wherein the sampling pattern identifies a time at which an upcoming synchronization signal is expected to be received by the sensor; and

perform, based on the sampling pattern, a sensor operation associated with the upcoming synchronization signal,
wherein the sensor operation is performed such that sensor data, associated with the sensor operation, is ready to be transmitted by the time at which the upcoming synchronization signal is expected to be received.

11. The system of claim 10 , wherein the sensor is further to:
receive the upcoming synchronization signal; and
transmit the sensor data, associated with the sensor operation, based on receiving the upcoming synchronization signal,
wherein the sensor data is transmitted during a period of time that at least partially overlaps a period of time during which the sensor performs a sensor operation associated with another upcoming synchronization signal.

12. The system of claim 11 , wherein the sensor data includes information that identifies a counter value corresponding to an actual time buffer associated with the upcoming synchronization signal.

13. The system of claim 10 , wherein the sensor is further to:
transmit other sensor data, associated with a received synchronization signal, during a period of time that at least partially overlaps a period of time during which the sensor operation, associated with the upcoming synchronization signal, is performed.

14. The system of claim 10 , wherein the sensor, when determining the sampling pattern, is to:
determine the sampling pattern based on a time difference between a time at which a first synchronization signal is received and a time at which a second synchronization signal is received,
wherein the first synchronization signal and the second synchronization signal are included in the group of synchronization signals.

15. The system of claim 10 , wherein the sensor, when performing the sensor operation, associated with the upcoming synchronization signal, is to:
perform the sensor operation based on a delay time that causes the sensor to wait, after receiving a previous synchronization signal, before performing of the sensor operation.

16. The system of claim 10 , wherein the sensor is further to:
receive the upcoming synchronization signal;
determine whether an actual time buffer, associated with receiving the upcoming synchronization signal, matches a target time buffer; and
selectively adjust a delay time, associated with triggering a sensor operation associated with another upcoming synchronization signal, based on whether the actual time buffer matches the target time buffer associated with the upcoming synchronization signal,
wherein the system, when selectively adjusting the delay time, is to:
refrain from adjusting the delay time when the actual time buffer matches the target time buffer;
increase the delay time when the actual time buffer does not match the target time buffer and the actual time buffer is longer than the target time buffer; or
decrease the delay time when the actual time buffer does not match the target time buffer and the actual time buffer is shorter than the target time buffer.

17. A method, comprising:
determining a sampling pattern based on receiving a group of synchronization signals,
wherein the sampling pattern identifies an expected time for receiving an upcoming synchronization signal; and

triggering and based on the sampling pattern, a performance of a sensor operation associated with the upcoming synchronization signal,
wherein the performance of the sensor operation is triggered before the upcoming synchronization signal is received by a sensor.

18. The method of claim 17 , further comprising:
receiving the upcoming synchronization signal; and
transmitting sensor data, resulting from the performance of the sensor operation, based on receiving the upcoming synchronization signal;
wherein the sensor data is transmitted during a period of time that at least partially overlaps with a period of time during which a performance of a sensor operation, associated with another upcoming synchronization signal, is triggered.

19. The method of claim 18 , wherein the sensor data includes information that identifies a counter value corresponding to a length of an actual time buffer associated with the upcoming

Assignees

• Infineon Technologies Ag

Inventors

• Aichriedler Leo

Classifications

• H04L7/08

  the synchronisation signals recurring cyclically · CPC title

• H04J3/0652

  Synchronisation among time division multiple access [TDMA] nodes, e.g. time triggered protocol [TTP] (bus network with centralized control in which slots are of a TDMA packet structure H04L12/4035) · CPC title

• H04L2012/40273

  the transportation system being a vehicle · CPC title

• H04L7/033

  using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop · CPC title

• H04J3/0635

  Clock or time synchronisation in a network (timer in protocols H04L69/28) · CPC title