Low thermal resistance hanging die package

US10347558B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10347558-B2
Application numberUS-201515748475-A
CountryUS
Kind codeB2
Filing dateAug 31, 2015
Priority dateAug 31, 2015
Publication dateJul 9, 2019
Grant dateJul 9, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments herein generally relate to the field of package assembly to facilitate thermal conductivity. A package may have a hanging die, and attach to a printed circuit board (PCB). The package may have an active side plane and an inactive side plane opposite the first active side plane. The package may also have a ball grid array (BGA) matrix having a height determined by a distance of a furthest point of the BGA matrix from the active side plane of the package. The package may have a hanging die attached to the active side plane of the package, the hanging die having a z-height greater than the BGA matrix height. When package is attached to the PCB, the hanging die may fit into an area on the PCB that is recessed or has been cut away, and a thermal conductive material may connect the hanging die and the PCB.

First claim

Opening claim text (preview).

What is claimed is: 1. A package comprising: a ball grid array, BGA, matrix electrically coupled to an active side plane of the package, the BGA matrix having a height determined by a distance of a farthest point of the BGA matrix to the active side plane; a hanging die attached to the active side plane of the package; a substrate having an active side plane attached to and electrically coupled to the BGA matrix, wherein the substrate includes a substrate recess beginning at the first active side plane of the substrate and continuing into a body of the substrate; wherein the active side plane of the package, an active side of the hanging die, and the active side plane of the substrate are generally parallel to each other in a first direction x and a second direction y perpendicular to the first direction x, and having a respective z-height measurement in a third direction perpendicular to the first direction and the second direction; wherein, when the package is coupled to the substrate, the hanging die is positioned within all or part of the substrate recess; and wherein at least part of the hanging die is tangent to the substrate. 2. The package of claim 1 , wherein a second die is molded into the package. 3. The package of claim 1 , wherein the hanging die is electrically coupled to and parallel to the active side plane of the package. 4. The package of claim 3 , wherein the hanging die is a combination of multiple hanging dies. 5. The package of claim 1 , wherein a material to dissipate heat directly connects at least part of the hanging die portion positioned within all or part of the substrate recess to at least part of the substrate. 6. The package of claim 5 , wherein a heat spreader is attached to an opposite substrate side; and wherein the heat spreader is directly connected to the material to dissipate heat. 7. The package of claim 5 , wherein the material to dissipate heat is one or more of a heat conductive paste, a gap pad, a heat spreader nose, or printed solder paste. 8. The package of claim 5 , wherein the material to dissipate heat further includes an intermetallic compound. 9. The package of claim 1 , wherein the substrate is a PCB, and the recess in the substrate is a PCB cutout. 10. The package of claim 1 , wherein the hanging die is connected to the substrate with underfill material. 11. A system with a package assembly, the system comprising: a printed circuit board, PCB, comprising: an active side plane; a connection area on the active side plane to electrically couple with a package assembly; and a recess within the connection area having dimensions sufficient for a hanging die of the package assembly to fit into when the package assembly is attached to the PCB; and a package assembly coupled with the PCB, the package assembly comprising: a hanging die coupled to an active side plane of the package assembly, wherein, when the package assembly is coupled to the substrate, the hanging die is positioned within all or part of the PCB recess; and wherein at least part of the hanging die is tangent to the PCB. 12. The system of claim 11 , wherein the PCB further includes: a thermally conductive material in contact with the hanging die and the PCB. 13. The system of claim 11 , wherein the PCB further includes; a heat spreader that is connected to a backside of the PCB that is not the active side plane; a thermally conductive material that connects the hanging die to the heat spreader. 14. The system of claim 11 , wherein the PCB further includes one or more thermally conductive metallic layers connected to the hanging die using thermally conductive material. 15. The system of claim 11 , wherein the thermally conductive material is a gap pad, heat dissipation paste, or printed solder paste.

Assignees

Inventors

Classifications

  • of die-attach connectors · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • characterised by arrangements for thermal management of the stacked chips · CPC title

  • the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL · CPC title

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Frequently asked questions

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What does patent US10347558B2 cover?
Embodiments herein generally relate to the field of package assembly to facilitate thermal conductivity. A package may have a hanging die, and attach to a printed circuit board (PCB). The package may have an active side plane and an inactive side plane opposite the first active side plane. The package may also have a ball grid array (BGA) matrix having a height determined by a distance of a fur…
Who is the assignee on this patent?
Intel Ip Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/68. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 09 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).