Method of driving display panel using a plurality of clock signals and display apparatus for performing the same

US10347191B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10347191-B2
Application numberUS-201113241419-A
CountryUS
Kind codeB2
Filing dateSep 23, 2011
Priority dateFeb 1, 2011
Publication dateJul 9, 2019
Grant dateJul 9, 2019

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Abstract

Official abstract text for this publication.

A method of driving a display panel includes providing a first clock signal having a first frequency and a second clock signal having a second frequency different from the first frequency. The method also includes providing a data signal of an N-th frame image to the display panel using the first clock signal, and providing a data signal of an (N+1)-th frame image to the display panel using the second clock signal. N is a natural number.

First claim

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What is claimed is: 1. A method of driving a display panel, the method comprising: providing a first clock signal having a first frequency based on a master clock signal; providing a data signal of an N-th frame image to the display panel using the first clock signal, wherein N is a natural number greater than 0; providing a second clock signal having a second frequency, the second frequency being different from the first frequency; and providing a data signal of an (N+1)-th frame image to the display panel using the second clock signal, wherein one of the first and second frequencies is greater than a frequency of the master clock signal, and the other of the first and second frequencies is smaller than the frequency of the master clock signal, wherein a sum of a cycle of the first clock signal and a cycle of the second clock signal is twice as great as a cycle of the master clock signal, wherein a ratio between the first and second frequencies is adjusted in real time, wherein the method further comprises providing a light source driving signal to a light source part to provide radiation to the display panel using the first clock signal and the second clock signal, wherein the light source driving signal comprises a low voltage level during a low period and a high voltage level during a high period, wherein a duration of the low period of the light source driving signal is substantially the same as the duration of the N-th frame period set by the first clock signal, and wherein a duration of the high period of the light source driving signal is substantially the same as the duration of the (N+1)-th frame period set by the second clock signal. 2. The method of claim 1 , wherein a duration of an (N+2)-th frame period corresponding to an (N+2)-th frame image is the same as a duration of an N-th frame period corresponding to the N-th frame image, wherein a duration of an (N+3)-th frame period corresponding to an (N+3)-th frame image is the same as a duration of an (N+1)-th frame period corresponding to the (N+1)-th frame image, and wherein the duration of the N-th frame period is not the same as the duration of the (N+1)-th frame period. 3. The method of claim 2 , wherein the N-th frame image comprises a first left eye image, the (N+1)-th frame image comprises a second left eye image, the (N+2)-th frame image comprises a first right eye image, and the (N+3)-th frame image comprises a second right eye image. 4. The method of claim 1 , wherein the second frequency of the second clock signal is less than the first frequency of the first clock signal. 5. The method of claim 1 , wherein a plurality of light source blocks disposed in a horizontal direction of a frame image selectively provide the radiation to a plurality of display blocks of the display panel depending on an image displayed on the display blocks. 6. The method of claim 1 , wherein the first clock signal is provided using the master clock signal provided from an external device, and wherein the second clock signal is provided using the master clock signal provided from the external device. 7. The method of claim 1 , wherein the first clock signal is provided using the master clock signal provided from an external device, and wherein the second clock signal is provided using the first clock signal. 8. The method of claim 1 , wherein each of the first clock signal and the second clock signal is provided using a phase locked loop. 9. A display apparatus, comprising: a display panel to display an image; a timing controller to provide a first clock signal having a first frequency and a second clock signal having a second frequency different from the first frequency, and to provide a data signal of an N-th frame image to the display panel using the first clock signal and a data signal of an (N+1)-th frame image to the display panel using the second clock signal, wherein N is a natural number greater than 0; and a light source part to provide radiation to the display panel, wherein the first clock signal is generated based on a master clock signal, and wherein one of the first and second frequencies is greater than a frequency of the master clock signal, and the other of the first and second frequencies is smaller than the frequency of the master clock signal, wherein a sum of a cycle of the first clock signal and a cycle of the second clock signal is twice as great as a cycle of the master clock signal, wherein a ratio between the first and second frequencies is adjusted in real time, wherein the timing controller is configured to provide a light source driving signal to drive the light source part using the first clock signal and the second clock signal, wherein the light source driving signal comprises a low voltage level during a low period and a high voltage level during a high period, wherein a duration of the low period of the light source driving signal is substantially the same as the duration of the N-th frame period set by the first clock signal, and wherein a duration of the high period of the light source driving signal is substantially the same as the duration of the (N+1)-th frame period set by the second clock signal. 10. The display apparatus of claim 9 , wherein a duration of an (N+2)-th frame period corresponding to an (N+2)-th frame image is substantially the same as a duration of an N-th frame period corresponding to the N-th frame image, wherein a duration of an (N+3)-th frame period corresponding to an (N+3)-th frame image is substantially the same as a duration of an (N+1)-th frame period corresponding to the (N+1)-th frame image, and wherein the duration of the N-th frame period is not the same as the duration of the (N+1)-th frame period. 11. The display apparatus of claim 10 , wherein the N-th frame image comprises a first left eye image, the (N+1)-th frame image comprises a second left eye image, the (N+2)-th frame image comprises a first right eye image, and the (N+3)-th frame image comprises a second right eye image. 12. The display apparatus of claim 9 , wherein the second frequency of the second clock signal is less than the first frequency of the first clock signal. 13. The display apparatus of claim 9 , wherein the light source part comprises: a plurality of light source blocks disposed in a horizontal direction of a frame image, wherein the light source blocks are configured to selectively provide the radiation to a plurality of display blocks of the display panel depending on an image displayed on the display blocks. 14. The display apparatus of claim 9 , wherein the timing controller comprises a first clock generator to provide the first clock signal and a second clock generator to provide the second clock signal, wherein the first clock generator is configured to provide the first clock signal using the master clock signal provided from an external device, and wherein the second clock generator is configured to provide the second clock signal using the master clock signal provided from the external device. 15. The display apparatus of claim 9 , wherein the timing controller comprises a first clock generator to provide the first clock signal and a second clock generator to provide the second clock signal, wherein the first clock generator is configured to provide the first clock signal using the master clock signal provided from an external device, and wherein the second clock generator is configured to provide the second clock signal using the first clock signal received from the first clock generator. 16. The display apparatus of claim 9 , wherein: the timing con

Assignees

Inventors

Classifications

  • Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167) · CPC title

  • Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display · CPC title

  • G09G3/3406Primary

    Control of illumination source (illumination devices structurally associated with liquid crystal cells G02F1/1336) · CPC title

  • by time modulation of the brightness of the illumination source · CPC title

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What does patent US10347191B2 cover?
A method of driving a display panel includes providing a first clock signal having a first frequency and a second clock signal having a second frequency different from the first frequency. The method also includes providing a data signal of an N-th frame image to the display panel using the first clock signal, and providing a data signal of an (N+1)-th frame image to the display panel using the…
Who is the assignee on this patent?
Park Dong Won, You Bong Hyun, Bae Jae Sung, and 2 more
What technology area does this patent fall under?
Primary CPC classification G09G3/3406. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 09 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).