Current sensor isolation

Patent metadata

Field	Value
Publication number	US-10345343-B2
Application number	US-201615179147-A
Country	US
Kind code	B2
Filing date	Jun 10, 2016
Priority date	Mar 15, 2013
Publication date	Jul 9, 2019
Grant date	Jul 9, 2019

Abstract

A current sensor integrated circuit includes a lead frame having a primary conductor and at least one secondary lead, a semiconductor die disposed adjacent to the primary conductor, an insulation structure disposed between the primary conductor and the semiconductor die, and a non-conductive insulative material enclosing the semiconductor die, the insulation structure, a first portion of the primary conductor, and a first portion of the at least one secondary lead to form a package. The first portion of the at least one secondary lead (between a first end proximal to the primary conductor and a second end proximal to the second, exposed portion of the at least one secondary lead) has a thickness that is less than a thickness of the second, exposed portion of the least one secondary lead. A distance between the second, exposed portion of the primary conductor and the second, exposed portion of the at least one secondary lead is at least 7.2 mm.

First claim

What is claimed is:

1. A current sensor integrated circuit comprising:
a lead frame having a primary conductor with a first surface, a second, substantially flat opposing surface, and at least one thinned region, the lead frame further having at least one secondary lead;
a semiconductor die disposed adjacent to the primary conductor and comprising a magnetic field sensing circuit to sense a magnetic field associated with a current through the primary conductor and to generate a secondary signal indicative of the current for coupling to the least one secondary lead;
an insulation structure disposed between the primary conductor and the semiconductor die; and
a non-conductive insulative material enclosing the semiconductor die, the insulation structure, the first surface of the primary conductor, the at least one thinned region of the primary conductor, and a first portion of the at least one secondary lead to form a package, wherein the second substantially flat surface of the primary conductor extends across the package from a first side of the package to a second, opposite, side of the package, wherein the insulation structure extends beyond a periphery of the primary conductor, wherein the second substantially flat surface of the primary conductor and a second portion of the at least one secondary lead are exposed outside of the package, and wherein a distance between the second substantially flat surface of the primary conductor and the second portion of the at least one secondary lead is at least approximately 7.2 mm.

2. The current sensor integrated circuit of claim 1 , wherein the first portion of the at least one secondary lead has a thickness that is less than a thickness of the second portion of the least one secondary lead.

3. The current sensor integrated circuit of claim 1 , wherein the second substantially flat surface of the primary conductor and the second portion of the at least one secondary lead are disposed on a bottom surface of the package.

4. The current sensor integrated circuit of claim 1 , wherein a distance of any path between the primary conductor and the at least one secondary lead through the non-conductive insulative material is at least approximately 0.4 mm.

5. The current sensor integrated circuit of claim 1 , wherein the insulation structure comprises a first insulation layer and a second insulation layer.

6. The current sensor integrated circuit of claim 5 , wherein each of the first insulation layer and the second insulation layer comprises a polyimide film.

7. The current sensor integrated circuit of claim 6 , wherein each of the first insulation layer and the second insulation layer comprises a layer of adhesive.

8. The current sensor integrated circuit of claim 7 , wherein the polyimide film and the adhesive layer are provided in the form of a tape.

9. The current sensor integrated circuit of claim 1 , further comprising a wire bond to couple the secondary signal to the least one secondary lead.

10. The current sensor integrated circuit of claim 1 , wherein the second portion of the at least one secondary lead extends from a third side of the package, orthogonal to the first and second sides of the package.

11. The current sensor integrated circuit of claim 1 , wherein the primary conductor comprises at least one notch substantially vertically aligned with at least one magnetic field sensing element supported by the semiconductor die.

12. A current sensor integrated circuit comprising:
a lead frame having a primary conductor with a first surface, a second, substantially flat opposing surface, and at least one thinned region, the lead frame further having at least one secondary lead;
a semiconductor die disposed adjacent to the primary conductor and comprising a magnetic field sensing circuit to sense a magnetic field associated with a current through the primary conductor and to generate a secondary signal indicative of the current for coupling to the least one secondary lead;
an insulation structure disposed between the primary conductor and the semiconductor die; and
a non-conductive insulative material enclosing the semiconductor die, the insulation structure, the first surface of the primary conductor, the at least one thinned region of the primary conductor, and a first portion of the at least one secondary lead to form a package, wherein the second substantially flat surface of the primary conductor extends across the package from a first side of the package to a second, opposite, side of the package,
wherein the second substantially flat surface of the primary conductor and a second portion of the at least one secondary lead are exposed outside of the package, and wherein the first portion of the at least one secondary lead has a thickness that is less than a thickness of the second portion of the least one secondary lead.

13. The current sensor integrated circuit of claim 12 , wherein a distance between the second substantially flat surface of the primary conductor and the second portion of the at least one secondary lead is at least approximately 7.2 mm.

14. The current sensor integrated circuit of claim 12 , wherein the insulation structure extends beyond a periphery of the primary conductor to establish a distance of any path between the primary conductor and the secondary signal through the non-conductive insulative material of at least approximately 0.4 mm.

15. The current sensor integrated circuit of claim 12 , wherein the second substantially flat surface of the primary conductor and the second portion of the at least one secondary lead are disposed on a bottom surface of the package.

16. The current sensor integrated circuit of claim 12 , wherein the insulation structure comprises a first insulation layer and a second insulation layer.

17. The current sensor integrated circuit of claim 16 , wherein each of the first insulation layer and the second insulation layer comprises a polyimide film.

18. The current sensor integrated circuit of claim 17 , wherein each of the first insulation layer and the second insulation layer comprises a layer of adhesive.

19. The current sensor integrated circuit of claim 18 , wherein the polyimide film and the adhesive layer are provided in the form of a tape.

20. The current sensor integrated circuit of claim 12 , further comprising a wire bond to couple the secondary signal to the least one secondary lead.

21. The current sensor integrated circuit of claim 12 , wherein the second portion of the at least one signal lead extends from a third side of the package, orthogonal to the first and second sides of the package.

22. The current sensor integrated circuit of claim 12 , wherein the primary conductor comprises at least one notch substantially vertically aligned with at least one magnetic field sensing element supported by the semiconductor die.

Assignees

• Allegro Microsystems Llc

Inventors

• Milano Shaun D
• Liu Shixi Louis

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/5449

  not being orthogonal to a side surface of the chip, e.g. fan-out arrangements · CPC title

• H10W72/856

  Bump connectors and die-attach connectors (bumps embedded in underfills H10W74/15) · CPC title