Semiconductor integrated circuit and electronic control unit
US-2017059416-A1 · Mar 2, 2017 · US
US10340824B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10340824-B2 |
| Application number | US-201715803229-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 3, 2017 |
| Priority date | Nov 4, 2016 |
| Publication date | Jul 2, 2019 |
| Grant date | Jul 2, 2019 |
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A motor-driven integrated circuit comprises a plurality of position comparators, a timer and a central processing. Each of the plurality of position comparators receives a pole detection signal denoted a position of a rotor of a motor. The timer receives a timing interrupt signal output by the plurality of position comparators when a predetermined edge of the pole detection signal is generated and records a time of the predetermined edge. The central processing unit obtains a rotation speed of the motor according to a time difference between two predetermined edges.
Opening claim text (preview).
The invention claimed is: 1. A motor driver integrated circuit, comprising: a plurality of position comparators, each of the plurality of position comparators receiving a pole detection signal denoting a position of a rotor of a motor; a timer receiving a timing interrupt signal output by the plurality of position comparators when a predetermined edge of the pole detection signal generated and recording a time of the predetermined edge; a logic selection circuit coupled between the plurality of position comparators and the timer, the logic selection circuit selecting two adjacent edges of the pole detection signal and controlling the timer to start; and a central processing unit obtaining a rotation speed of the motor according to a time difference between two adjacent edges selected by the logic selection circuit. 2. The motor driver integrated circuit of claim 1 , wherein the logic selection circuit selects two adjacent edges of one pole detection signal, two adjacent rising edges of one pole detection signal, two adjacent falling edges of the one pole detection signal, the two adjacent edges of two pole detection signals, the two adjacent rising edges of two pole detection signals, or the two adjacent falling edge of two pole detection signals according to the setting of the central processing unit. 3. The motor driver integrated circuit of claim 1 , wherein the motor driver integrated circuit comprises at least two position comparators, the central processing unit obtaining the rotation speed according to at least two pole detection signals. 4. The motor driver integrated circuit of claim 1 , wherein the pole detection signal is obtained by a Hall sensor or by a back-EMF zero-crossing detection method. 5. The motor driver integrated circuit of claim 1 , wherein when one of the plurality of position comparators receives the predetermined edge and outputs the timing interrupt signal to the timer, the timer records a first time; when a next predetermined edge is generated, the timer receives the timing interrupt signal and records a second time; and the central processing unit obtains the rotation speed of the motor via a time difference between the first time and the second time. 6. The motor driver integrated circuit of claim 5 , wherein the first time is a time when the predetermined edge is generated for a first pole detection signal, and the second time is a time when the predetermined edge is generated for a second pole detection signal. 7. The motor driver integrated circuit of claim 5 , wherein after the second time is recorded, the timer clears the first time and records the second time as the first time, when a next predetermined edge is generated, a second time is recorded. 8. The motor driver integrated circuit of claim 1 , further comprising a PWM output unit; an overcurrent comparator receiving a detection signal and comparing the detection signal with a reference value; wherein when the detection signal is larger than the reference value, the PWM output unit is entered to an overcurrent protection mode under control an overcurrent protection signal output by the overcurrent comparator. 9. The motor driver integrated circuit of claim 8 , wherein the overcurrent comparator directly outputs the overcurrent protection signal to the PWM output unit and controls the PWM output unit to enter the overcurrent protection mode. 10. The motor driver integrated circuit of claim 8 , wherein the overcurrent comparator outputs the overcurrent protection signal to the central processing unit and the central processing unit controls the PWM output unit to enter the overcurrent protection mode. 11. The motor driver integrated circuit of claim 10 , further comprising a plurality of operation amplifiers, each operation amplifier receives a current flowing through a winding, the central processing unit obtains a rotation speed according to the current. 12. The motor driver integrated circuit of claim 8 , further comprising an interrupt controller, wherein the overcurrent comparator outputs the overcurrent protection signal to the interrupt controller, the interrupt controller outputs an interrupt signal to the central processing unit, and the central processing unit controls the PWM output unit enter the overcurrent protection mode. 13. The motor driver integrated circuit of claim 8 , wherein when the PWM output unit is entered into the overcurrent protection mode, the PWM output unit performs one of following operations: stopping outputting drive signal; reducing a duty of the drive signal; and stopping outputting the drive signal and resetting to output the drive signal after a preset time delay. 14. The motor driver integrated circuit of claim 1 , further comprising a shifter connected to the central processing unit via a bus. 15. A motor device, comprising a motor and a motor driver integrated circuit of claim 1 . 16. An application apparatus, comprising a motor device of claim 15 . 17. The application apparatus of claim 16 , wherein the application apparatus is one of a pump, a fan, a household appliance, and a vehicle. 18. The motor driver integrated circuit of claim 1 , further comprising a plurality of operation amplifiers, wherein the plurality of operation amplifiers simultaneously collect currents of the motor, and the central processing unit obtain the rotation speed of the motor. 19. The motor driver integrated circuit of claim 1 , further comprising: a bare die having an 8-bit microcontroller fabricated by a 0.15 μm semiconductor process, wherein the 8-bit microcontroller has a highest frequency which is larger than 50 MHz. 20. The motor driver integrated circuit of claim 1 , further comprising a clock circuit outputting a system clock signal to the 8-bit microcontroller, wherein during a power-on period of the motor driver integrated circuit, a frequency of the system clock signal output by the clock circuit is one quarter of a highest frequency of the system clock signal.
in either direction of rotation · CPC title
Control strategies in general, e.g. linear type, e.g. P, PI, PID, using robust control · CPC title
Arrangements for speed regulation of a single motor wherein the motor speed is measured and compared with a given physical value so as to adjust the motor speed · CPC title
influenced by the relative movement between the Hall device and magnetic fields (see G01R33/06) · CPC title
and for generating speed information · CPC title
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