Semiconductor element with hall element and sealing resin

Patent metadata

Field	Value
Publication number	US-10340444-B2
Application number	US-201715847532-A
Country	US
Kind code	B2
Filing date	Dec 19, 2017
Priority date	Dec 28, 2016
Publication date	Jul 2, 2019
Grant date	Jul 2, 2019

Abstract

A semiconductor device includes a Hall element, a sealing resin and at least one mount surface. The Hall element includes a functional surface and at least one electrode provided on the functional surface. The sealing resin includes a resin obverse surface and a resin reverse surface spaced apart from each other in a thickness direction, and covers at least a portion of the Hall element. The mount surface is electrically connected to the electrode of the Hall element and exposed from the resin reverse surface. The Hall element includes an exposed surface opposite to the functional surface. The exposed surface is flush with either one of the resin obverse surface and the resin reverse surface.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a Hall element including a functional surface and at least one electrode provided on the functional surface;
a sealing resin including a resin obverse surface and a resin reverse surface spaced apart from each other in a thickness direction, the sealing resin covering at least a portion of the Hall element; and
at least one mount surface electrically connected to the electrode and exposed from the resin reverse surface,
wherein the Hall element includes an exposed surface opposite to the functional surface, the exposed surface being flush with either one of the resin obverse surface and the resin reverse surface,
as viewed in the thickness direction, the sealing resin surrounds the Hall element and overlaps with the Hall element.

2. The semiconductor device according to claim 1 , further comprising at least one terminal made of a metal, the terminal providing the mount surface,
wherein the electrode is bonded to the terminal with a conductive bonding material, and
the exposed surface of the Hall element is exposed from the resin obverse surface.

3. The semiconductor device according to claim 2 , wherein the Hall element includes a pair of first sides along a first direction and a pair of second sides along a second direction perpendicular to the first direction, as viewed in plan, and
the sealing resin includes a pair of first resin side surfaces spaced apart from each other in the first direction and a pair of second resin side surfaces spaced apart from each other in the second direction, as viewed in plan.

4. The semiconductor device according to claim 3 , wherein the Hall element is similar in shape to the sealing resin as viewed in plan.

5. The semiconductor device according to claim 4 , wherein the Hall element and the sealing resin are square as viewed in plan.

6. The semiconductor device according to claim 3 , further comprising a first additional terminal and a second additional terminal,
wherein the terminal includes a first side surface and a third side surface spaced apart from each other in the first direction, and a second side surface and a fourth side surface spaced apart from each other in the second direction,
the first side surface of the terminal faces the first additional terminal in the first direction, and
the second side surface of the terminal faces the second additional terminal in the second direction.

7. The semiconductor device according to claim 6 , wherein the third side surface of the terminal is exposed from and flush with one of the paired first resin side surfaces.

8. The semiconductor device according to claim 6 , wherein the fourth side surface of the terminal is exposed from and flush with one of the paired second resin side surfaces.

9. The semiconductor device according to claim 6 , wherein the third side surface of the terminal is covered with the sealing resin, and
the terminal includes an extension extending from the third side surface and exposed from one of the first resin side surfaces.

10. The semiconductor device according to claim 6 , wherein the fourth side surface of the terminal is covered with the sealing resin, and
the terminal includes an extension extending from the fourth side surface and exposed from one of the second resin side surfaces.

11. The semiconductor device according to claim 6 , wherein the terminal includes a first thin portion formed along the first side surface, the first thin portion having a thickness smaller than a distance between the functional surface and the exposed surface and being covered with the sealing resin from the resin reverse surface.

12. The semiconductor device according to claim 11 , wherein the electrode partially overlaps with the first thin portion as viewed in plan.

13. The semiconductor device according to claim 6 , wherein the terminal includes a second thin portion formed along the second side surface, the second thin portion having a thickness smaller than a distance between the functional surface and the exposed surface and being covered with the sealing resin from the resin reverse surface.

14. The semiconductor device according to claim 13 , wherein the electrode partially overlaps with the second thin portion as viewed in plan.

15. The semiconductor device according to claim 1 , further comprising a substrate including a base and a wiring, the base including a base obverse surface and a base reverse surface spaced apart from each other in the thickness direction, the wiring including an obverse surface portion formed on the base obverse surface, a reverse surface portion formed on the base reverse surface, and a penetrating portion penetrating the base and connecting the obverse surface portion and the reverse surface portion to each other,
wherein the resin reverse surface and the base obverse surface face each other,
the electrode is bonded to the obverse surface portion of the wiring pattern with a conductive bonding material, and
the exposed surface of the Hall element is exposed from the resin obverse surface.

16. The semiconductor device according to claim 15 , wherein a periphery of the substrate coincides with a periphery of the sealing resin as viewed in plan.

17. The semiconductor device according to claim 16 , wherein both of the Hall element and the substrate are rectangular and the Hall element is inclined with respect to the substrate, as viewed in plan.

18. The semiconductor device according to claim 2 , further comprising a protective layer covering both the exposed surface of the Hall element and the resin obverse surface.

19. The semiconductor device according to claim 1 , further comprising a terminal electrically connected to the electrode, wherein the terminal has a periphery including a curved portion, as viewed in the thickness direction.

20. The semiconductor device according to claim 1 , further comprising a terminal electrically connected to the electrode, wherein the Hall element comprises a magnetosensitive layer electrically connected to the electrode, and
as viewed in the thickness direction, an entirety of the electrode overlaps with the magnetosensitive layer and the terminal.

Assignees

• Rohm Co Ltd

Inventors

• Makimura Yuji
• Masaki Takaaki

Classifications

• G01R33/07 Primary

  Hall effect devices · CPC title

• H01L43/04 Primary

  Electricity · mapped topic

• H01L43/14

  Electricity · mapped topic

• H01L43/065

  Electricity · mapped topic

• H10N52/01

  Manufacture or treatment · CPC title