Image sensor and image sensor pixel having JFET source follower

Patent metadata

Field	Value
Publication number	US-10340305-B2
Application number	US-201615563593-A
Country	US
Kind code	B2
Filing date	Mar 31, 2016
Priority date	Mar 31, 2015
Publication date	Jul 2, 2019
Grant date	Jul 2, 2019

Abstract

Some embodiments provide an image sensor pixel comprising a junction field effect transistor (JFET) and a floating diffusion configured to act as the gate of the JFET. An image sensor may comprise a plurality of pixels, at least one pixel comprising a floating diffusion region formed in a semiconductor substrate, a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion, and a JFET having (i) a source and a drain coupled by a channel region, and (ii) a gate comprising the floating diffusion region.

First claim

What is claimed is:

1. An image sensor comprising a plurality of pixels, at least one pixel comprising:
a floating diffusion region formed in a semiconductor substrate;
a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion;
a JFET having (i) a source and a drain coupled by a channel region, and (ii) a gate comprising the floating diffusion region; and
wherein the channel region comprises a first doped region of a first conductivity type configured to conduct current between the source and drain along a lateral direction substantially parallel to a surface of the substrate, the floating diffusion region comprises a second doped region of a second conductivity type opposite to the first conductivity type, and wherein the second doped region of the floating diffusion is disposed adjacent to and beneath the first doped region along the lateral direction between the source and drain.

2. The image sensor according to claim 1 , wherein the floating diffusion and the channel region are configured such that charge selectively transferred to the floating diffusion by operation of the transfer gate modulates current flow between the source and drain via the channel region.

3. The image sensor according to claim 1 , wherein the floating diffusion and the channel region are configured such that charge selectively transferred to the floating diffusion by operation of the transfer gate causes a change in the gate potential that is followed by the potential of the source.

4. The image sensor according to claim 1 , wherein the capacitance of floating diffusion is small enough to provide a conversion gain of at least 500 μV/e− and the image sensor is configured as a QIS.

5. The image sensor according to claim 1 , wherein the channel is configured as a buried channel.

6. The image sensor according to claim 1 , wherein the image sensor is configured as a backside-illuminated device.

7. The image sensor according to claim 1 , wherein the transfer gate is spaced away from and does not overlap the floating diffusion.

8. The image sensor according to claim 1 , wherein the floating diffusion is configured to be reset using a reset drain without a reset gate.

9. The image sensor according to claim 8 , wherein the transfer gate is spaced away from and does not overlap the floating diffusion.

10. The image sensor according to claim 1 , wherein the pixel comprises a photodiode disposed substantially beneath the transfer gate and having a charge storage/accumulation region that is configured to store the photocharge that is selectively transferred to the floating diffusion using the transfer gate.

11. The image sensor according to claim 1 , wherein the pixels are configured as shared pixels.

12. The image sensor according to claim 1 , wherein the channel is a p-type channel.

13. A method for providing an image sensor comprising a plurality of pixels, the method comprising:
forming a floating diffusion in a semiconductor substrate;
forming a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion; and
forming a JFET in the semiconductor substrate, the JFET having (i) a source and a drain coupled by a channel region, and (ii) a gate comprising the floating diffusion region, wherein the channel region comprises a first doped region of a first conductivity type configured to conduct current between the source and drain along a lateral direction substantially parallel to a surface of the substrate, the floating diffusion region comprises a second doped region of a second conductivity type opposite to the first conductivity type, and wherein the second doped region of the floating diffusion is disposed adjacent to and beneath the first doped region along the lateral direction between the source and drain.

14. The method according to claim 13 , wherein the floating diffusion and the channel region are configured such that charge selectively transferred to the floating diffusion by operation of the transfer gate modulates current flow between the source and drain via the channel region.

15. The method according to claim 13 , wherein the floating diffusion and the channel region are configured such that charge selectively transferred to the floating diffusion by operation of the transfer gate causes a change in the gate potential that is followed by the potential of the source.

16. The method according to claim 13 , wherein the capacitance of floating diffusion is small enough to provide a conversion gain of at least 500 μV/e− and the image sensor is configured as a QIS.

17. The method according to claim 13 , wherein the channel is configured as a buried channel.

18. The method according to claim 13 , wherein the transfer gate is spaced away from and does not overlap the floating diffusion.

19. The method according to claim 13 , wherein the floating diffusion is configured to be reset using a reset drain without a reset gate.

20. An image sensor comprising a plurality of pixels, at least one pixel comprising:
a floating diffusion region formed in a semiconductor substrate;
a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion;
a JFET having (i) a source and a drain coupled by a channel region, and (ii) a gate comprising the floating diffusion region, wherein the channel region comprises a first doped region of a first conductivity type configured to conduct current between the source and drain along a lateral direction substantially parallel to a surface of the substrate; and
wherein the floating diffusion and the channel region are configured such that charge selectively transferred to the floating diffusion by operation of the transfer gate causes a change in the gate potential that is followed by the potential of the source.

21. The image sensor according to claim 20 , wherein the transfer gate is spaced away from and does not overlap the floating diffusion.

22. The image sensor according to claim 20 , wherein the floating diffusion is configured to be reset using a reset drain without a reset gate.

23. The image sensor according to claim 20 , wherein the pixel comprises a photodiode disposed substantially beneath the transfer gate and having a charge storage/accumulation region that is configured to store the photocharge that is selectively transferred to the floating diffusion using the transfer gate.

Assignees

• Dartmouth College

Inventors

• Ma Jiaju
• Anzagira Leo
• Fossum Eric R

Classifications

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/778

  comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title

• H04N25/59

  by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance · CPC title

• H01L27/14679 Primary

  Electricity · mapped topic

• H01L27/14689

  Electricity · mapped topic