Hardware front-end for a GNSS receiver

Patent metadata

Field	Value
Publication number	US-10338231-B2
Application number	US-201514954310-A
Country	US
Kind code	B2
Filing date	Nov 30, 2015
Priority date	Nov 30, 2015
Publication date	Jul 2, 2019
Grant date	Jul 2, 2019

Abstract

A hardware front-end for a software-defined GNSS receiver, which includes an antenna connected to a transmission line that is connected to a pair of separate circuits, one for receiving L1 signals and one for receiving L2 signals. Each circuit includes at least one bandpass filter, at least one LNA, and a single-chip GNSS receiver that receives analog RF signals and provides digitized I and Q signals. The pair of circuits differ in that a first one is designed to receive, filter, and amplify RF signals at the L1 frequency corresponding to the designed input frequency of the receiver and the second one is designed to receive, filter, and amplify RF signals at the L2 frequency, which is significantly different from the first frequency. The second circuit also includes a mixer to convert the L2 frequency to the L1 frequency, so that a similar receiver can be used in each circuit.

First claim

We claim:

1. A hardware front-end for a software-defined GNSS receiver, the front-end comprising:
an antenna;
a first RF circuit that is coupled to and receives a first RF signal at a first RF frequency in a first frequency range from the antenna, and produces a first GNSS signal, the first RF circuit including:
a first low-noise amplifier that amplifies the first RF signal; and
a first direct conversion receiver that downconverts the first RF signal to create separate, digitized I and Q channels;

a second RF circuit that is coupled to and receives a second RF signal at a second RF frequency from the antenna, and produces a second GNSS signal, wherein the second RF frequency is significantly different than the first RF frequency and is outside of the first frequency range and wherein the first RF frequency is in the range of 1500-1635 MHz and the second RF frequency is in the range of 1200-1250 MHz, the second RF circuit including:
a second low-noise amplifier that amplifies the second RF signal;
a first bandpass filter that filters the second RF signal;
an oscillator that provides a signal at an LO frequency;
a mixer that is receptive of the second RF signal and receptive of the LO frequency signal and mixes the two signals to produce a third RF signal that is in the first frequency range; and
a second direct conversion receiver that converts the third RF signal into separate, digitized I and Q channels; and

a microcontroller that receives the separate I and Q channels from the first RF circuit and receives the separate I and Q channels from the second RF circuit and creates a digital bus signal therefrom, wherein the first direct conversion receiver generates a GNSS L1 signal and the second direct conversion receiver generates a GNSS L2 signal that has been upconverted to a frequency range of the GNSS L1 signal to allow combination of L2 information in the GNSS L2 signal with L1 information of the GNSS L1 signal provided in the digital bus signal.

2. A hardware front-end as defined in claim 1 , wherein the digital bus signal is provided on a USB port.

3. A hardware front-end as defined in claim 1 , in further combination with a mobile computing device having a software radio thereon.

4. A hardware front-end as defined in claim 1 , further including an error correction signal circuit that is also receptive of the first RF signal and generates an error correction RF signal, the error correction signal circuit including:
a second bandpass filter that filters the first RF signal;
a third direct conversion receiver that converts the error correction RF signal to separate, digitized I and Q channels;
wherein the I and Q channels from the third direct conversion receiver represent error correction information broadcast from one or more Earth stations via one or more satellites.

5. A hardware front-end as defined in claim 1 , further including a diplexer that receives a signal from the antenna and provides two separate output signals, the first RF signal and the second RF signal.

6. A hardware front-end as defined in claim 5 , wherein the diplexer includes a first transmission line tuned to the first RF frequency and a second transmission line tuned to the second RF frequency.

7. A hardware front-end as defined in claim 6 , wherein the first and second transmission lines are tuned to their respective frequencies by arranging for the transmission lines to each have an impedance of 50 ohms at their respective frequency.

8. A hardware front-end as defined in claim 6 , wherein the diplexer further includes a pair of bandpass filters, a separate one of the pair that receives the signal from each of the two transmission lines.

9. A hardware front-end as defined in claim 1 , wherein the antenna includes a first patch antenna, a second patch antenna, a ground plane, and a dielectric material separating each of the first patch antenna, the second patch antenna, and the ground plane from each other, and wherein each of those four components are manufactured together in one integral body.

10. A hardware front-end as defined in claim 9 , wherein the antenna is manufactured with a multi-layer printed circuit board process.

11. A hardware front-end as defined in claim 10 , wherein the antenna is conductively connected with a separately-manufactured ground plane that is significantly larger than the ground plane of the antenna.

12. A hardware front-end as defined in claim 1 , further including a second bandpass filter upstream of the first low-noise amplifier and a third bandpass filter downstream of the first low-noise amplifier.

13. A hardware front-end as defined in claim 1 , further including a fourth bandpass filter downstream of the second low-noise amplifier and wherein the first bandpass filter is upstream of the second low-noise amplifier.

14. A hardware front-end as defined in claim 1 , wherein the first and second direct conversion receivers digitize the RF signals they receive.

15. A hardware front-end as defined in claim 14 , further including a synchronization circuit that provides synchronization signals to the first and second direct conversion receivers to synchronize the digitizing of the RF signals.

16. A hardware front-end for a software-defined GNSS receiver, the front-end comprising:
an antenna;
a first RF circuit that is coupled to the antenna and produces a first GNSS signal, the first RF circuit including:
a first transmission line coupled to the antenna;
a first bandpass filter and low-noise amplifier receptive of an RF signal at a first RF frequency from the first transmission line, wherein the first RF frequency is in the range of 1500-1635 MHz; and
a first direct conversion receiver that downconverts an RF signal from the bandpass filter and low-noise amplifier to create separate, digitized I and Q channels;

a second RF circuit that is coupled to the antenna and produces a second GNSS signal, the second RF circuit including:
a second transmission line coupled to the antenna;
a second bandpass filter and low-noise amplifier receptive of an RF signal at a second RF frequency from the second transmission line, wherein the second RF frequency is in the range of 1200-1250 MHz;
an oscillator that provides a signal at an LO frequency;
a mixer that is receptive of an RF frequency signal from the second bandpass filter and low-noise amplifier and is receptive of the LO frequency signal and mixes the two signals to produce a third RF signal at a frequency that is similar to the first RF frequency and in the range of 1500-1635 MHz; and
a second direct conversion receiver that converts the RF signal from the mixer to separate, digitized I and Q channels; and

a microcontroller that receives the separate I and Q channels from the first RF circuit and receives the separate I and Q channels from the second RF circuit and creates a digital bus signal therefrom that includes L1 and L2 information.

17. A hardware front-end for a software-defined GNSS receiver, the front-end comprising:
an antenna;
a first RF circuit that is coupled to and receives a first RF signal at a first RF frequency in a first frequency range from the antenna of 1500-1635 MHz, and produces a first GNSS signal, the first RF circuit including:
a first low-noise amplifier that amplifies the first RF signal; and
a first receiver that downconverts the first RF signal;

a second RF circuit that is coupled to and receives a second RF signal at a second RF frequency from the antenna, and produces a second GNSS signal, wherein the second RF frequency is in the range of 1200-1250 MHz, the

Assignees

• Trimble Navigation Ltd
• Trimble Inc

Inventors

• Wallace Gregory
• Weisenburger Shawn D

Classifications

• G01S19/36 Primary

  relating to the receiver frond end · CPC title

• G01S19/32

  Multimode operation in a single same satellite system, e.g. GPS L1/L2 · CPC title

• H01Q1/2291

  used in Bluetooth® or Wi-Fi® devices of Wireless Local Area Networks [WLAN] (H01Q1/241 takes precedence; WLAN in general H04W) · CPC title

• H01Q21/065

  Patch antenna array · CPC title

• H01Q25/02

  providing sum and difference patterns (H01Q25/04 takes precedence) · CPC title