Storing interrupt location for fast interrupt register access in hypervisors

Patent metadata

Field	Value
Publication number	US-10331589-B2
Application number	US-201313766264-A
Country	US
Kind code	B2
Filing date	Feb 13, 2013
Priority date	Feb 13, 2013
Publication date	Jun 25, 2019
Grant date	Jun 25, 2019

Abstract

Methods, systems, and computer program products for using a stored interrupt location to provide fast interrupt register access in hypervisors are presented. A computer-implemented method may include maintaining an area of memory in a hypervisor to track a location of an interrupt vector corresponding to an asserted interrupt in a virtual machine, storing the location of the interrupt vector in the area of memory when responding to the asserted interrupt, and examining the area of memory to determine when an interrupt is present in the virtual machine.

First claim

What is claimed is:

1. A method, comprising:
maintaining, by a virtual machine monitor (VMM) executed by a processing device, an area of memory allocated to the VMM to track a location of an interrupt vector of an asserted interrupt for a virtual machine of a plurality of virtual machines, wherein the VMM manages the plurality of virtual machines;
receiving, by the VMM, the asserted interrupt for the virtual machine of the plurality of virtual machines;
setting, by the VMM, an interrupt vector bit for the asserted interrupt in an emulated register of a plurality of emulated registers associated with the virtual machine responsive to an indication that there is not another interrupt that is pending for the virtual machine;
examining, by the VMM, the area of memory allocated to the VMM to determine whether a number of other interrupt vector bits set for the virtual machine exceeds a threshold number; and
responsive to determining that the number of other interrupt vector bits set for the virtual machine does not exceed the threshold number, storing, by the VMM, in the area of memory allocated to the VMM, interrupt location information identifying the interrupt vector bit set for the asserted interrupt in the emulated register of the plurality of emulated registers associated with the virtual machine, wherein the stored interrupt location information causes the VMM to subsequently locate the interrupt vector of the asserted interrupt without scanning the plurality of emulated registers associated with the virtual machine of the plurality of virtual machines.

2. The method of claim 1 , further comprising obtaining the indication that there is not another interrupt that is pending for the virtual machine comprises:
examining, by the VMM, a counter that is stored in another area of memory that is assigned to the VMM without scanning the plurality of emulated registers associated with the virtual machine, wherein the counter represents a number of asserted interrupts for the virtual machine, wherein the number being zero indicates that there is no interrupt that is pending for the virtual machine.

3. The method of claim 2 , further comprising:
updating, by the VMM, the counter to track the asserted interrupt that is injected into the virtual machine, wherein the updating of the counter causes the VMM to subsequently determine whether the interrupt vector is set in the virtual machine without scanning the plurality of emulated registers associated with the virtual machine.

4. The method of claim 1 , wherein the storing is performed in view of determining that no interrupt vector is pending for the virtual machine.

5. The method of claim 1 , further comprising:
detecting, by the VMM, that the interrupt location information that is stored in the area of memory is set to a value that does not correspond to a valid interrupt vector.

6. The method of claim 1 , further comprising:
notifying, by the VMM, the virtual machine that interrupt processing for the asserted interrupt has completed.

7. The method of claim 1 , wherein the area of memory is initialized to a value other than a valid interrupt vector location.

8. The method of claim 1 , wherein the virtual machine provides a software-based emulation of an advanced programmable interrupt controller (APIC) architecture in a simulated x86 environment.

9. A non-transitory computer-readable medium comprising instructions that, responsive to execution by a processing device of a host machine, cause the processing device to:
maintaining, by a virtual machine monitor (VMM) executed by the processing device, an area of memory allocated to the VMM to track a location of an interrupt vector of an asserted interrupt for a virtual machine of a plurality of virtual machines, wherein the VMM manages the plurality of virtual machines;
receive, by the VMM, the asserted interrupt for the virtual machine of the plurality of virtual machines;
set, by the VMM, an interrupt vector bit for the asserted interrupt in an emulated register of a plurality of emulated registers associated with the virtual machine responsive to an indication that there is not another interrupt that is pending for the virtual machine;
examine, by the VMM, the area of memory allocated to the VMM to determine whether a number of other interrupt vector bits set for the virtual machine exceeds a threshold number; and
responsive to determining that the number of other interrupt vector bits set for the virtual machine does not exceed the threshold number, store, by the VMM, in the area of memory allocated to the VMM, interrupt location information identifying the interrupt vector bit set for the asserted interrupt in the emulated register of the plurality of emulated registers associated with the virtual machine, wherein the stored interrupt location information causes the VMM to subsequently locate the interrupt vector of the asserted interrupt without scanning the plurality of registers associated with the virtual machine of the plurality of virtual machines.

10. The non-transitory computer-readable medium of claim 9 , processing device is further to:
examine, by the VMM, a counter to determine a number of asserted interrupts associated with the virtual machine, wherein the number being zero indicates that there is no interrupt that is pending in the virtual machine.

11. The non-transitory computer-readable medium of claim 10 , wherein the processing device is further to:
update, by the VMM, the counter to track the asserted interrupt that is injected into the virtual machine, wherein the update of the counter causes the VMM to subsequently determine whether the interrupt vector is set in the virtual machine without having the processing device scan the plurality of emulated registers associated with the virtual machine.

12. The non-transitory computer-readable medium of claim 9 , wherein the processing device is further to:
receive, by the VMM, a deasserted interrupt; and
notify, by the VMM, the virtual machine to perform an end of interrupt for the asserted interrupt.

13. The non-transitory computer-readable medium of claim 9 , wherein the processing device is further to:
detect, by the VMM, that the interrupt location information stored in the area of memory is set to a value that does not correspond to a valid interrupt vector.

14. A system, comprising:
a memory; and
a processing device of a host machine, the processing device coupled to the memory, the processing device to:
maintain, by a virtual machine monitor (VMM) executed by the processing device, an area of memory allocated to the VMM to track a location of an interrupt vector of an asserted interrupt for a virtual machine of a plurality of virtual machines, wherein the VMM manages the plurality of virtual machines;
receive, by the VMM, the asserted interrupt being for the virtual machine of the plurality of virtual machines;
set, by the VMM, an interrupt vector bit for the asserted interrupt in an emulated register of a plurality of emulated registers associated with the virtual machine responsive to an indication that there is not another interrupt that is pending for the virtual machine;
examine, by the VMM, the area of memory allocated to the VMM to determine whether a number of other interrupt vector bits set for the virtual machine exceeds a threshold number; and
responsive to determining that the number of other interrupt vector bits set for the virtual machine does not exceed the threshold number, store, by the VMM, in the area of memory allocated to the VMM, interrupt location information identifying the interrupt vector bit set for the asserted inter

Assignees

• Red Hat Israel Ltd

Inventors

• Tsirkin Michael
• Hod Ronen

Classifications

• G06F13/24 Primary

  using interrupt (G06F13/32 takes precedence) · CPC title