Output combination of transistors in an MRT radio-frequency power amplifier

US10330753B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10330753-B2
Application numberUS-201514971093-A
CountryUS
Kind codeB2
Filing dateDec 16, 2015
Priority dateDec 19, 2014
Publication dateJun 25, 2019
Grant dateJun 25, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A power electronic unit for an amplifier of an imaging magnetic resonance tomography (MRT) system is provided. The power electronic unit includes at least one printed circuit board, on which a plurality of transistors are arranged. Ports (e.g., drain and source) of the plurality of transistors are connected together by electrically conductive connections, and the plurality of transistors are all arranged on one side of the at least one printed circuit board. An output line or cable parallel to the connections, at least in sections, runs on the opposing side of the printed circuit board and may be connected or is connected with or without further interconnected elements (e.g., a balun) to transmitting coils of the MRT.

First claim

Opening claim text (preview).

The invention claimed is: 1. A power electronic unit for an amplifier of an imaging magnetic resonance tomography (MRT) system, the power electronic unit comprising: a printed circuit board; and a plurality of transistors arranged on the printed circuit board, wherein ports of transistors of the plurality of transistors are connected together by electrically conductive connections, wherein the plurality of transistors is arranged on one side of the printed circuit board, and wherein an output line or cable runs on a side opposing the one side of the printed circuit board and is connectable to transmitting coils of the MRT system, wherein the output line or the cable is parallel to the electrically conductive connections at least in sections. 2. The power electronic unit of claim 1 , wherein the output line or cable is connectable to the transmitting coils via further interconnected elements, wherein the further interconnected elements include a balun. 3. The power electronic unit of claim 1 , wherein source ports of a first subset of transistors of the plurality of transistors are connected together by the electrically conductive connections, drain ports of a second subset of transistors of the plurality of transistors are connected together by the electrically conductive connections, or a combination thereof. 4. The power electronic unit of claim 3 , wherein, in connections between the source ports of the first subset of transistors, currents run antiparallel to currents in connections between the drain ports of the second subset of transistors. 5. The power electronic unit of claim 3 , wherein the source ports of the plurality of transistors are connected together. 6. The power electronic unit of claim 1 , wherein the plurality of transistors is arranged on the printed circuit board without bonding ports. 7. The power electronic unit of claim 1 , wherein a load impedance of a transistor of the plurality of transistors is 12.5 ohm. 8. The power electronic unit of claim 7 , wherein the load impedance of the transistor is 12.5 ohm in a push-pull application. 9. The power electronic unit of claim 1 , wherein an output impedance of the power electronic unit is 50 ohm. 10. The power electronic unit of claim 1 , wherein an output impedance of the power electronic unit is transformed from 50 ohm to a load impedance of a transistor of the plurality of transistors of 12.5 ohm. 11. The power electronic unit of claim 10 , wherein the output impedance is transformed with a transformer having a winding ratio of 2:1 of an amplifier side to an output side. 12. The power electronic unit of claim 1 , wherein the printed circuit board includes two modules, wherein each module comprises transistors of the plurality of transistors mounted on a same side of the printed circuit board. 13. The power electronic unit of claim 1 , wherein the printed circuit board includes at least four modules, wherein each module comprises transistors of the plurality of transistors all mounted on a same side of the printed circuit board. 14. The power electronic unit of claim 1 , wherein the printed circuit board includes four modules, wherein each module comprises transistors of the plurality of transistors all mounted on a same side of the printed circuit board, wherein a spacing between each pair of adjacent modules of the four modules is greater in one direction than in the direction perpendicular thereto. 15. The power electronic unit of claim 1 , wherein the printed circuit board includes a plurality of modules, each module of the plurality of modules including transistors of the plurality of transistors, three internal drain ports, and two internal source ports. 16. The power electronic unit of claim 1 , further comprising a 1:1 or 2:1 transformer. 17. The power electronic unit of claim 1 , wherein an output of the power electronic unit comprises two ports formed at two opposing sides of the power electronic unit. 18. The power electronic unit of claim 1 , wherein an output of the power electronic unit comprises two ports formed at a same side of the power electronic unit. 19. The power electronic unit of claim 1 , wherein the power electronic unit is a high frequency (HF) amplifier arrangement or part of an HF amplifier arrangement of the MRT system.

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What does patent US10330753B2 cover?
A power electronic unit for an amplifier of an imaging magnetic resonance tomography (MRT) system is provided. The power electronic unit includes at least one printed circuit board, on which a plurality of transistors are arranged. Ports (e.g., drain and source) of the plurality of transistors are connected together by electrically conductive connections, and the plurality of transistors are al…
Who is the assignee on this patent?
Albrecht Adam, Siemens Ag
What technology area does this patent fall under?
Primary CPC classification G01R33/3614. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 25 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).