Multi-channel flow sensing
US-9002665-B2 · Apr 7, 2015 · US
US10330508B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10330508-B2 |
| Application number | US-201514964172-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 9, 2015 |
| Priority date | Dec 9, 2015 |
| Publication date | Jun 25, 2019 |
| Grant date | Jun 25, 2019 |
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A method of ultrasound flow metering includes applying a first and second pulse train to an ultrasound transducer pair (T1, T2) positioned for coupling ultrasonic waves therebetween. Responsive to the first pulse train applied to T1, T1 transmits an ultrasonic wave received as received ultrasonic wave (R12) by T2 after propagating through fluid in a pipe. Responsive to the second pulse train applied to T2, T2 transmits an ultrasonic wave received as received ultrasonic wave by (R21) T1 after propagating through the fluid. During the pulse trains, R12 and R21 build up in amplitude to provide excitation portions. The pulse trains are terminated, so that R12 and R21 decay as a damped free oscillation. Windowing is applied to R12 and R21 to generate windowed portions. A signal delay between t12 and t21 (ΔTOF) is calculated using only windowed portions, and a fluid flow is calculated from the ΔTOF.
Opening claim text (preview).
The invention claimed is: 1. A method of ultrasound flow metering, comprising: receiving, by a first transducer, a first pulse train from a flow electronics circuit; transmitting, by a first transducer, a first ultrasonic wave to a second transducer, the first ultrasonic wave propagating downstream through a fluid in a pipe section in response to receiving the first pulse train, wherein an amplitude of the first ultrasonic wave increases when receiving the first pulse train; receiving, by the second transducer, a second pulse train from a flow electronics circuit; transmitting, by the second transducer, a second ultrasonic wave to the first transducer, the second ultrasonic wave propagating upstream through the fluid in the pipe section in response to receiving the second pulse train, wherein an amplitude of the second ultrasonic wave increases when receiving the second pulse train; receiving, by the first transducer, the second ultrasonic wave from the second transducer; receiving, by the second transducer, the first ultrasonic wave from the first transducer; generating, by the flow electronics circuit, a first windowed portion of the first received ultrasonic wave and a second windowed portion of the second received ultrasonic wave; calculating, by the flow electronics circuit, a signal delay using the first and second windowed portion; and calculating, by the flow electronics circuit, a flow of the fluid from the calculated signal delay. 2. The method of claim 1 , wherein generating the first and second windowed portions comprises using a linearly tapered window. 3. The method of claim 1 , wherein generating the first and second windowed portions comprises using a Hanning window. 4. The method of claim 1 , wherein the fluid comprises water. 5. The method of claim 1 , wherein the first and second transceiver are spaced apart from one another along a first pipe wall of an inline pipe section. 6. The method of claim 1 , wherein: the amplitude of the first ultrasonic wave decreases when not receiving the first pulse train to form a tail portion of the first ultrasonic wave, and generating the first windowed portion selectively removes at least a section of the tail portion. 7. The method of claim 1 , wherein an excitation frequency for the first pulse train is at or within 5% of a resonant frequency of the first transceiver. 8. An integrated circuit, comprising: a substrate having a semiconductor surface; a processor formed on the semiconductor surface; a non-volatile memory storing a flow measurement algorithm and instructions; a data bus for coupling the non-volatile memory to the processor; an address bus for coupling the non-volatile memory to the processor; input/output (IO) pins, coupled to the data bus and the address bus for coupling to a first transducer and to a second transducer; the processor being operable when executing the instructions to: transmit a first pulse train to a first transducer, wherein the first transducer: transmits a first ultrasonic wave to a second transducer, the first ultrasonic wave propagating downstream through a fluid in a pipe section in response to receiving the first pulse train, wherein an amplitude of the first ultrasonic wave increases when receiving the first pulse train; and receives a second ultrasonic wave from the second transducer; transmit a second pulse train to the second transducer, wherein the second transducer: transmits the second ultrasonic wave to the first transducer, the second ultrasonic wave propagating upstream through the fluid in the pipe section in response to receiving the second pulse train, wherein an amplitude of the second ultrasonic wave increases when receiving the second pulse train; and receives the first ultrasonic wave from the first transducer; generate a first windowed portion of the first received ultrasonic wave and a second windowed portion of the second received ultrasonic wave; calculate a signal delay using the first and second windowed portions; and calculate a flow of the fluid from the calculated signal delay. 9. The integrated circuit of claim 8 , wherein generating the first and second windowed portions comprises using a linearly tapered window. 10. The integrated circuit of claim 8 , wherein generating the first and second windowed portions comprises using a Hanning window. 11. The integrated circuit of claim 8 , wherein: the amplitude of the first ultrasonic wave decreases when not receiving the first pulse train to form a tail portion of the first ultrasonic wave, and generating the first windowed portion selectively removes at least a section of the tail portion. 12. The integrated circuit of claim 8 , wherein the processor IC comprises a microcontroller unit (MCU). 13. An ultrasonic flowmeter, comprising: a first transducer and a second transducer positioned on a pipe wall; a flow electronics circuit including a transceiver coupled to a processor having an associated memory storing a flow measurement algorithm coupled to the first and second transducers for: transmitting a first pulse train to the first transducer, wherein the first transducer: transmits a first ultrasonic wave to the second transducer, the first ultrasonic wave propagating downstream through a fluid in a pipe section in response to receiving the first pulse train, wherein an amplitude of the first ultrasonic wave increases when receiving the first pulse train; and receives a second ultrasonic wave from the second transducer; transmitting a second pulse train to the second transducer, wherein the second transducer: transmits the second ultrasonic wave to the first transducer, the second ultrasonic wave propagating upstream through the fluid in a pipe section in response to receiving the second pulse train, wherein an amplitude of the second ultrasonic wave increases when receiving the second pulse train; and receives the first ultrasonic wave from the first transducer; generating a first windowed portion of the first received ultrasonic wave and a second windowed portion of the second received ultrasonic wave; calculating a signal delay using the first and second windowed portion; and calculating a flow of the fluid from the calculated signal delay. 14. The ultrasonic flowmeter of claim 13 , wherein the first and second transceivers are spaced apart from one another along a first pipe wall of an inline pipe section. 15. The ultrasonic flowmeter of claim 13 , wherein generating the first and second window partitions comprises using a Hanning window. 16. The ultrasonic flowmeter of claim 13 , wherein: the amplitude of the first ultrasonic wave decreases when not receiving the first pulse train to form a tail portion of the first ultrasonic wave, and generating the first windowed portion selectively removes at least a section of the tail portion. 17. The ultrasonic flowmeter of claim 13 , wherein the processor comprises a microcontroller unit (MCU).
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