Semiconductor device

Patent metadata

Field	Value
Publication number	US-10326626-B2
Application number	US-201816221667-A
Country	US
Kind code	B2
Filing date	Dec 17, 2018
Priority date	Mar 22, 2017
Publication date	Jun 18, 2019
Grant date	Jun 18, 2019

Abstract

A semiconductor device of an embodiment includes first and second couplers, an encoding circuit, and a demodulating circuit. The encoding circuit executes differential Manchester encoding on digital data based on a clock inputted thereto via the first coupler and outputs an encoded data. The demodulating circuit includes a first sampling circuit which samples the encoded data inputted via the second coupler based on a sampling frequency set to be two times higher than that of the encoded data and which outputs first sample data, a second sampling circuit which samples the encoded data at a timing earlier than that in the first sampling circuit and which outputs second sample data, a determination circuit which determines whether or not the first and the second sample data match each other, and a selection circuit which selects first phase data or second phase data from the first sample data.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a first coupler;
an encoding circuit which executes differential Manchester encoding on digital data based on a clock inputted thereto via the first coupler, and which outputs an encoded data;
a second coupler; and
a demodulating circuit which demodulates the encoded data inputted thereto via the second coupler, wherein
the demodulating circuit includes
a first sampling circuit which samples the encoded data based on a sampling frequency set to be two times higher than that of the encoded data, and which outputs first sample data,
a second sampling circuit which samples the encoded data at a timing earlier than that in the first sampling circuit based on the sampling frequency, and which outputs second sample data,
a determination circuit which determines whether or not the first sample data and the second sample data match each other, and
a selection circuit which selects first phase data obtained by even-numbered sampling or second phase data obtained by odd-numbered sampling from the first sample data, on the basis of determination data generated at the determination circuit, and wherein

the first coupler and the second coupler include galvanic coupling elements which transmit the clock and the encoded data individually in a non-contact manner.

2. The semiconductor device according to claim 1 , wherein the first coupler and the second coupler include a transmission coil and a reception coil which are magnetic coupling each other.

3. The semiconductor device according to claim 1 , wherein
the first coupler and the second coupler include a transmission coil and a magnetroresistive element which are magnetic coupling each other.

4. The semiconductor device according to claim 1 , wherein the first coupler and the second coupler include a capacitive coupling element, respectively.

5. The semiconductor device according to claim 1 , wherein
the first coupler and the second coupler are connected to the transmission and reception chips as independent elements.

6. The semiconductor device according to claim 1 , wherein
the first coupler and the second coupler are included in the transmission and reception chips.

7. The semiconductor device according to claim 5 , wherein
the transmission and reception chips are sealed with a mold resin in addition to an encapsulating resin.

8. The semiconductor device according to claim 6 , wherein
the transmission and reception chips are sealed with a mold resin in addition to an encapsulating resin.

9. The semiconductor device according to claim 7 , wherein
the transmission and reception chips are connected by a frame and a wire.

10. The semiconductor device according to claim 8 , wherein
the transmission and reception chips are connected by a frame and a wire.

11. A semiconductor device comprising:
a coupler;
an encoding circuit which executes differential Manchester encoding on digital data based on a clock inputted thereto, and which outputs an encoded data; and
a demodulating circuit which demodulates the encoded data, wherein
the demodulating circuit includes
a first sampling circuit which samples the encoded data based on a sampling frequency set to be two times higher than that of the encoded data, and which outputs first sample data,
a second sampling circuit which samples the encoded data at a timing earlier than that in the first sampling circuit based on the sampling frequency, and which outputs second sample data,
a determination circuit which determines whether or not the first sample data and the second sample data match each other, and
a selection circuit which selects first phase data obtained by even-numbered sampling or second phase data obtained by odd-numbered sampling from the first sample data, on the basis of determination data generated at the determination circuit, and wherein

the coupler include galvanic coupling elements which transmit the encoded data in a non-contact manner.

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Yamagishi Toshiyuki
• Horiguchi Tomoya

Classifications

• G02B6/2932

  comprising a directional router, e.g. directional coupler, circulator · CPC title

• H03M5/06

  Code representation, e.g. transition, for a given bit cell depending only on the information in that bit cell · CPC title

• H04Q11/0066

  Provisions for optical burst or packet networks · CPC title

• H04L7/041

  using special codes as synchronising signal · CPC title

• H04Q2011/006

  Full mesh · CPC title