Amplifier adapted for noise suppression

Patent metadata

Field	Value
Publication number	US-10326410-B2
Application number	US-201715730133-A
Country	US
Kind code	B2
Filing date	Oct 11, 2017
Priority date	Mar 16, 2015
Publication date	Jun 18, 2019
Grant date	Jun 18, 2019

Abstract

Systems and methods of noise suppression by an amplifier are presented. In one exemplary embodiment, an amplifier comprises first and fourth transistors configured as a first differential pair of transistors in a common-gate configuration, and second and third transistors configured as a second differential pair of transistors in a common-source configuration. The first and fourth transistors are operative to receive, from a differential input, by a source of each first and fourth transistor, a differential input signal. Further, a drain of each first and fourth transistor is coupled to respective first and second outputs configured as a differential output. The second and third transistors are operative to output, from a drain of each second and third transistor, to the respective second and first outputs, a differential output signal. Further, a gate of each second and third transistor is coupled to the respective first and second inputs.

First claim

The invention claimed is:

1. An amplifier adapted for noise suppression, comprising:
first and fourth transistors configured as a first differential pair of transistors operative to receive, from first and second inputs configured as a differential input, by a source of each respective first and fourth transistor, a differential input signal, with a drain of each first and fourth transistor coupled to respective first and second outputs configured as a differential output;
second and third transistors configured as a second differential pair of transistors in a common-source configuration and operative to output, from a drain of each respective second and third transistor, to the respective second and first outputs, a differential output signal, with a gate of each second and third transistor coupled to the respective first and second inputs; and
wherein a transconductance of each second and third transistor exceeds a transconductance of the respective first and fourth transistors.

2. The amplifier of claim 1 , wherein the drain of each first and fourth transistor is coupled to the respective first and second outputs so that all signal current, except parasitic losses, flowing through those drains flow through the respective first and second outputs.

3. The amplifier of claim 1 , wherein the drain of each second and third transistor is coupled to the respective second and first outputs so that all signal current, except parasitic losses, flowing through those drains flow through the respective second and first outputs.

4. The amplifier of claim 1 , wherein:
a first load is coupled between the first output and a second voltage rail;
a second load is coupled between the second output and the second voltage rail;
a first inductive element is coupled between the first input and a third voltage rail; and
a second inductive element is coupled between the second input and the third voltage rail.

5. The amplifier of claim 1 , wherein:
transconductance of the first transistor is substantially equal to transconductance of the fourth transistor within ±5%; and
transconductance of the second transistor is substantially equal to transconductance of the third transistor within ±5%.

6. The amplifier of claim 1 , wherein the gate of each first and fourth transistor is coupled to a bias voltage rail.

7. The amplifier of claim 1 , wherein the gate of each first and fourth transistor is coupled to the respective second and first input.

8. The amplifier of claim 1 , wherein the transconductance of each second and third transistor is no more than five times the transconductance of the respective first and fourth transistors.

9. The amplifier of claim 1 , wherein the transconductance of each second and third transistor is equal to two times the transconductance of the respective first and fourth transistors.

10. The amplifier of claim 1 , wherein the transconductance of each second and third transistor is equal to three times the transconductance of the respective first and fourth transistors.

11. The amplifier of claim 1 , wherein the transconductance of each first and fourth transistor is 0.02 siemens.

12. The amplifier of claim 1 , wherein the differential input signal is a differential input voltage and the differential output signal is a differential output current.

13. A receiving apparatus adapted for noise suppression, comprising:
an amplifier, comprising:
first and fourth transistors configured as a first differential pair of transistors operative to receive, from first and second inputs configured as a differential input, by a source of each respective first and fourth transistor, a differential input signal, with a drain of each first and fourth transistor coupled to respective first and second outputs configured as a differential output;
second and third transistors configured as a second differential pair of transistors in a common-source configuration and operative to output, from a drain of each respective second and third transistor, to the respective second and first outputs, a differential output signal, with a gate of each second and third transistor coupled to the respective first and second inputs; and
wherein a transconductance of each second and third transistor exceeds a transconductance of the respective first and fourth transistors.

14. The receiving apparatus of claim 13 , further comprising:
a balun with the first and second inputs coupled to a differential output of the balun; and
a mixer with the first and second outputs coupled to a differential input of the mixer.

15. The receiving apparatus of claim 14 , further comprising an antenna coupled to a single-ended input of the balun.

16. A mobile communication device adapted for noise suppression, comprising
a receiving apparatus having an amplifier, the amplifier comprising:
first and fourth transistors configured as a first differential pair of transistors operative to receive, a differential input, by a source of each respective first and fourth transistor, respective first and second input signals, collectively being a differential input signal, with a drain of each first and fourth transistor coupled to respective first and second outputs configured as a differential output;
second and third transistors configured as a second differential pair of transistors in a common-source configuration and operative to output, from a drain of each respective second and third transistor, to the respective second and first outputs, a differential output signal, with a gate of each second and third transistor coupled to the respective first and second inputs; and
wherein a transconductance of each second and third transistor exceeds a transconductance of the respective first and fourth transistors.

17. The amplifier of claim 16 , wherein the amplifier is an amplifier whose differential input voltage produces a differential output current.

18. The amplifier of claim 16 , wherein the amplifier is configured as a low noise amplifier (LNA) of a radio frequency (RF) receiver.

19. A method performed by an amplifier for suppressing noise, the amplifier having first and second inputs configured as a differential input, first and second outputs configured as a differential output, first and fourth transistors configured as a first differential pair of transistors, and second and third transistors configured as a second differential pair of transistors in a common-source configuration, comprising:
receiving, from the first and second inputs, by a source of each respective first and fourth transistor, a differential input signal, with a drain of each first and fourth transistor coupled to the respective first and second outputs;
outputting, from a drain of each second and third transistor, to the respective second and first outputs, a differential output signal, with a gate of each second and third transistor coupled to the respective first and second inputs; and
wherein a transconductance of each second and third transistor exceeds a transconductance of the respective first and fourth transistors.

Assignees

• Ericsson Telefon Ab L M

Inventors

• Mastantuono Daniele
• Mattisson Sven

Classifications

• H03F3/193

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title

• H03F2203/45318

  the AAC comprising a cross coupling circuit, e.g. two extra transistors cross coupled · CPC title

• H03F1/26 Primary

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title