Reduced noise by performing processing during low-noise periods of interfering circuitry
US-2017285859-A1 · Oct 5, 2017 · US
US10325974B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10325974-B2 |
| Application number | US-201715683597-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 22, 2017 |
| Priority date | Nov 18, 2016 |
| Publication date | Jun 18, 2019 |
| Grant date | Jun 18, 2019 |
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The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a shielding pattern created from a layer identical to a pixel electrode and configured to prevent a display function of a display function layer from being adversely affected by a signal from a signal line.
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What is claimed is: 1. A display substrate, comprising: a signal line configured to transmit a signal; a display function layer configured to display an image; a pixel electrode; and a shielding pattern arranged at a layer identical to, and insulated from, the pixel electrode, wherein the shielding pattern is arranged at a side of the signal line adjacent to the display function layer, and an orthogonal projection of the signal line onto a plane where the display substrate is located is located within an orthogonal projection of the shielding pattern onto the plane where the display substrate is located; wherein the display substrate further comprises a plurality of pixel regions, each pixel region comprising a thin film transistor (TFT); wherein the signal line comprises a gate line configured to apply the signal to a gate electrode of the TFT, and a data line configured to apply the signal to a source electrode of the TFT; wherein the TFT comprises a first TFT and a second TFT connected in series, a source electrode of the first TFT and a drain electrode of the second TFT are of an integral structure, the gate line is electrically connected to a gate electrode of the first TFT and a gate electrode of the second TFT, the data line is electrically connected to a source electrode of the second TFT, and the pixel electrode is electrically connected to a drain electrode of the first TFT. 2. The display substrate according to claim 1 , wherein the shielding pattern comprises a first shielding pattern, and an orthogonal projection of the gate line onto the plane where the display substrate is located is located within an orthogonal projection of the first shielding pattern onto the plane where the display substrate is located. 3. The display substrate according to claim 2 , wherein the shielding pattern further comprises a second shielding pattern, and an orthogonal projection of the data line onto the plane where the display substrate is located is located within an orthogonal projection of the second shielding pattern onto the plane where the display substrate is located. 4. The display substrate according to claim 3 , wherein an active layer of the TFT is in electrical contact with the source electrode and a drain electrode and comprises a channel region corresponding to a gap between the source electrode and the drain electrode, the shielding pattern further comprises a third shielding pattern arranged at a side of the channel region adjacent to the display function layer, and an orthogonal projection of the channel region onto the plane where the display substrate is located is located within an orthogonal projection of the third shielding pattern onto the plane where the display substrate is located. 5. The display substrate according to claim 4 , wherein each of the first shielding pattern, the second shielding pattern and the third shielding pattern is spaced apart from and insulated from the pixel electrode. 6. The display substrate according to claim 5 , wherein the first shielding pattern, the second shielding pattern and the third shielding pattern are of an integral structure. 7. The display substrate according to claim 2 , wherein the display substrate is an electronic paper display substrate, a liquid crystal display substrate or an organic light-emitting diode (OLED) display substrate. 8. The display substrate according to claim 7 , wherein in the case that the display substrate is the electronic paper display substrate, the display function layer is an electronic ink layer, in the case that the display substrate is the liquid crystal display substrate, the display function layer is a liquid crystal layer, and in the case that the display substrate is the OLED display substrate, the display function layer is a light-emitting layer. 9. The display substrate according to claim 8 , wherein the display substrate is the electronic paper display substrate, each pixel region further comprises a reflection mechanism formed integrally with the drain electrode of the TFT, and an orthogonal projection of the reflection mechanism onto the plane where the display substrate is located is located within an orthogonal projection of the pixel electrode onto the plane where the display substrate is located. 10. The display substrate according to claim 9 , wherein a passivation layer is arranged between the drain electrode and the pixel electrode, and the pixel electrode is electrically connected to the reflection mechanism through a via-hole in the passivation layer. 11. A display device comprising the display substrate according to claim 1 . 12. The display device according to claim 11 , further comprising a power source whose output voltage is adjustable, wherein the shielding pattern is electrically connected to the power source. 13. The display device according to claim 12 , further comprising an annular conductive pattern arranged at a periphery of a display region, wherein the shielding pattern is electrically connected to the power source through the conductive pattern. 14. The display device according to claim 11 , wherein the shielding pattern comprises a first shielding pattern, and an orthogonal projection of the gate line onto the plane where the display substrate is located is located within an orthogonal projection of the first shielding pattern onto the plane where the display substrate is located. 15. The display device according to claim 14 , wherein the shielding pattern further comprises a second shielding pattern, and an orthogonal projection of the data line onto the plane where the display substrate is located is located within an orthogonal projection of the second shielding pattern onto the plane where the display substrate is located. 16. The display device according to claim 15 , wherein an active layer of the TFT is in electrical contact with the source electrode and a drain electrode and comprises a channel region corresponding to a gap between the source electrode and the drain electrode, the shielding pattern further comprises a third shielding pattern arranged at a side of the channel region adjacent to the display function layer, and an orthogonal projection of the channel region onto the plane where the display substrate is located is located within an orthogonal projection of the third shielding pattern onto the plane where the display substrate is located. 17. The display device according to claim 16 , wherein each of the first shielding pattern, the second shielding pattern and the third shielding pattern is spaced apart from and insulated from the pixel electrode, and the first shielding pattern, the second shielding pattern and the third shielding pattern are of an integral structure. 18. A method for manufacturing the display substrate according to claim 1 , comprising steps of: forming a signal line configured to transmit a signal; forming a display function layer configured to display an image; forming a pixel electrode configured to generate an electric field for driving the display function layer to display the image; and forming a shielding pattern together with the pixel electrode using an identical conductive thin film through a single patterning process, wherein the shielding pattern is insulated from the pixel electrode and arranged at a side of the signal line adjacent to the display function layer, an orthogonal projection of the signal line onto a plane where the display substrate is located is located within an orthogonal projection of the shielding pattern onto the plane where the display substrate is locat
characterised by their electrical, optical, physical properties; materials therefor; method of making · CPC title
Physics · mapped topic
Physics · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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