Circuit for testing display panel, method for testing display panel, and display panel

Patent metadata

Field	Value
Publication number	US-10325535-B2
Application number	US-201715421123-A
Country	US
Kind code	B2
Filing date	Jan 31, 2017
Priority date	Dec 31, 2013
Publication date	Jun 18, 2019
Grant date	Jun 18, 2019

Abstract

A method for testing a display panel includes: applying a first level signal to a first sub-pixel and a third sub-pixel of a first pixel unit and applying a second level signal to a second sub-pixel of the first pixel unit; applying the second level signal to a first sub-pixel and a third sub-pixel of a second pixel unit and applying the first level signal to a second sub-pixel of the second pixel unit; and detecting a short circuit between adjacent sub-pixels. The first level signal has a voltage polarity opposite to a voltage polarity of the second level signal. Therefore, it is ensured that any two adjacent sub-pixels have opposite voltage polarities when the short circuit between adjacent sub-pixels of the display panel is detected. The method also provides improved testing abilities to detect an open circuit in a sub-pixel.

First claim

What is claimed is:

1. A method for testing a display panel using a circuit, wherein the display panel comprises a plurality of pixel units, the pixel unit comprises a first pixel unit and a second pixel unit adjacent to the first pixel unit in a first direction, each of the first pixel unit and the second pixel unit comprises a first sub-pixel, a second sub-pixel, and a third sub-pixel, and the second sub-pixel is located between the first sub-pixel and the third sub-pixel; and wherein the method comprises:
applying a first level signal to the first sub-pixel of the first pixel unit and the third sub-pixel of the first pixel unit and applying a second level signal to the second sub-pixel of the first pixel unit,
applying the second level signal to the first sub-pixel of the second pixel unit and the third sub-pixel of the second pixel unit and applying the first level signal to the second sub-pixel of the second pixel unit, and
detecting a short circuit between adjacent sub-pixels;
wherein the circuit comprises:
a first signal source comprising an output end directly connected to a source of the first sub-pixel of the first pixel unit,
a second signal source comprising an output end directly connected to a source of the second sub-pixel of the first pixel unit,
a third signal source comprising an output end directly connected to a source of the third sub-pixel of the first pixel unit,
a first selector comprising an output end directly connected to a source of the first sub-pixel of the second pixel unit, a first input end connected to the first signal source, and a second input end connected to the second signal source,
a second selector comprising an output end directly connected to a source of the second sub-pixel of the second pixel unit, a first input end connected to the second signal source, and a second input end connected to the first signal source or the third signal source, and
a third selector comprising an output end directly connected to a source of the third sub-pixel of the second pixel unit, a first input end connected to the third signal source, and a second input end connected to the second signal source,
wherein the first signal source and the third signal source output the first level signal, the second signal source outputs the second level signal, and the first level signal has a voltage polarity opposite to a voltage polarity of the second level signal.

2. The method according to claim 1 , further comprising:
applying the first level signal to the first sub-pixel of the first pixel unit and the third sub-pixel of the first pixel unit and applying the second level signal to the second sub-pixel of the first pixel unit,
applying the first level signal to the first sub-pixel of the second pixel unit and the third sub-pixel of the second pixel unit and applying the second level signal to the second sub-pixel of the second pixel unit, and
detecting an open circuit in each sub-pixel.

3. The method according to claim 1 , wherein the first level signal is a positive voltage signal and the second level signal is a negative voltage signal; or the first level signal is a negative voltage signal and the second level signal is a positive voltage signal.

Assignees

• Shanghai Avic Opto Electronics Co Ltd
• Tianma Micro Electronics Co Ltd

Inventors

• Yang Xu
• Tian Nana
• Wang Xupeng
• Ren Zhiyong
• Ding Xiaoyuan
• Huang Zhengyuan

Classifications

• G09G3/006 Primary

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

• G09G2330/12

  Test circuits or failure detection circuits included in a display system, as permanent part thereof · CPC title

• G09G3/3614

  Control of polarity reversal in general · CPC title

• G01R31/50

  Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections (testing of sparking plugs H01T13/58) · CPC title

• G01R31/025

  Physics · mapped topic