Signal generator and signal generation method

Patent metadata

Field	Value
Publication number	US-10324489-B2
Application number	US-201715690625-A
Country	US
Kind code	B2
Filing date	Aug 30, 2017
Priority date	Jan 9, 2017
Publication date	Jun 18, 2019
Grant date	Jun 18, 2019

Abstract

The present application provides a signal generator, comprising a control circuit configured to receive input information, and generate variable control word information based on the received input information; a base time unit generation circuit configured to generate a base time unit; and a signal generation circuit configured to receive the variable control word information from the control circuit and receive the base time unit from the base time unit generation circuit, and generate a target signal having a variable frequency based on the received variable control word information and the received base time unit.

First claim

What is claimed is:

1. A signal generator, comprising:
a control circuit configured to receive input information, and generate variable control word information based on the received input information, the input information including type information indicating a waveform type of frequency change of a target signal and parameter information of the target signal;
a base time unit generation circuit configured to generate a base time unit; and
a signal generation circuit configured to receive the variable control word information from the control circuit and receive the base time unit from the base time unit generation circuit, and generate the target signal having a variable frequency based on the received variable control word information and the received base time unit,
wherein the control circuit comprises:
an input subcircuit configured to receive the input information;
a calculation subcircuit configured to extract the type information and the parameter information from the input information received from the input subcircuit, and calculate the variable control word information based on the type information and the parameter information; and
an output subcircuit configured to output the control word information calculated by the calculation subcircuit to the signal generation circuit,
the output frequency of the signal generation circuit is approximately proportional to the control word information when a predetermined condition is satisfied, and the predetermined condition is that a change amount of the control word information is less than a predetermined threshold.

2. The signal generator according to claim 1 , wherein the waveform type of frequency change of the target signal includes at least a triangular wave, a sine wave, an exponential wave; and
the parameter information of the target signal includes a carrier frequency (f c ), a modulation rate (f m ), a maximum frequency deviation (Δf), and an interval length of the target signal.

3. The signal generator according to claim 1 , wherein the base time unit generation circuit comprises:
a voltage-controlled oscillator that oscillates at a predetermined oscillation frequency;
a phase-locked loop circuit that locks an output frequency of the voltage-controlled oscillator to a first output frequency;
K output terminals that output K phase-evenly-spaced output signals, K being a positive integer greater than one,
wherein the base time unit is a time span between any two adjacent output signals outputted by the K output terminals.

4. The signal generator according to claim 3 , wherein the signal generation circuit comprises:
a first input subcircuit configured to receive the K phase-evenly-spaced output signals from the base time unit generation circuit;
a second input subcircuit configured to receive the variable control word information from the control circuit; and
an output subcircuit configured to output the generated target signal having a variable frequency.

5. The signal generator according to claim 4 , wherein the first input subcircuit comprises:
a K→1 multiplexer having a plurality of input terminals for receiving the K phase-evenly-spaced output signals, a control input terminal, and an output terminal,
the output subcircuit comprises:
a toggle flip-flop for generating a pulse train, the toggle flip-flop comprising:
a D-type flip-flop having a clock input terminal for receiving an output from an output terminal of the K→1 multiplexer, a data input terminal, and an output terminal for outputting a first clock signal; and

an inverter having an input terminal for receiving the first clock signal and an output terminal for outputting a second clock signal, the second clock signal being connected to the data input terminal of the D-type flip-flop, the first clock signal containing the pulse train;
an output terminal for outputting the first clock signal as the target signal having a variable frequency;
the second input subcircuit comprises:
a control logic circuit having a control word information input terminal for receiving the control word information, a clock input terminal for receiving the first clock signal, and an output terminal connected to the control input terminal of the K→1 multiplexer.

6. The signal generator according to claim 4 , wherein the first input subcircuit comprises:
a first K→1 multiplexer having a plurality of input terminals for receiving the K phase-evenly-spaced output signals, a control input terminal, and an output terminal;
a second K→1 multiplexer having a plurality of input terminals for receiving the K phase-evenly-spaced output signals, a control input terminal, and an output terminal; and
a 2→1 multiplexer having a first input terminal for receiving an output of the first K→1 multiplexer, a second input terminal for receiving an output of the second K→1 multiplexer, a control input terminal, and an output terminal,
the output subcircuit comprises:
a toggle flip-flop for generating a pulse train, the toggle flip-flop comprising:
a D-type flip-flop having a clock input terminal for receiving an output from an output terminal of the K→1 multiplexer, a data input terminal, and an output terminal for outputting a first clock signal; and
an inverter having an input terminal for receiving the first clock signal and an output terminal for outputting a second clock signal, the second clock signal being connected to the data input terminal of the D-type flip-flop, the first clock signal containing the pulse train;
an output terminal for outputting the first clock signal as the target signal having a variable frequency;

the second input subcircuit comprises:
a control logic circuit having a control word information input terminal for receiving the control word information, a first clock input terminal for receiving the first clock signal, a second clock input terminal for receiving the second clock signal, a first output terminal connected to the control input terminal of the first K→1 multiplexer, and a second output terminal connected to the control input terminal of the second K→1 multiplexer,
wherein the first clock signal is connected to the control input terminal of the 2→1 multiplexer.

7. The signal generator according to claim 3 , wherein the control word information is set in form of F=l+r, I being an integer in range of [2, 2K], r being a decimal in range of [0, 1).

8. The signal generator according to claim 1 , wherein the control circuit generates, based on frequency change characteristics of the target signal, the control word information having the same change characteristics.

9. A signal generation method for use in a signal generator, the method comprising:
receiving input information and generating variable control word information based on the received input information, the input information including type information indicating a waveform type of frequency change of a target signal and parameter information of the target signal;
generating a base time unit; and
generating the target signal having a variable frequency based on the variable control word information and the base time unit,
the method further comprises:
extracting the type information and the parameter information from the input information, and calculating the variable control word information based on the type information and the parameter information; and
outputting the calculated control word information to a signal generation circuit of the signal generator,
wherein the output frequency of the signal generation circuit is approximately proportional to the control word information when a predetermined condition is satisfied, and the predetermined condition is that a change amount of the control word informa

Assignees

• Boe Technology Group Co Ltd

Inventors

• Xiu Liming

Classifications

• G06F1/0342 Primary

  for generating simultaneously two or more related waveforms, e.g. with different phase angles only · CPC title

• G06F1/08 Primary

  Clock generators with changeable or programmable clock frequency · CPC title

• H03K7/06

  Frequency or rate modulation, i.e. PFM or PRM · CPC title

• H03L7/18

  using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title

• H03L7/08

  Details of the phase-locked loop · CPC title