Voltage regulators

Patent metadata

Field	Value
Publication number	US-10324481-B2
Application number	US-201615736765-A
Country	US
Kind code	B2
Filing date	Jun 16, 2016
Priority date	Jun 16, 2015
Publication date	Jun 18, 2019
Grant date	Jun 18, 2019

Abstract

A low-dropout voltage regulator ( 2 ) comprises: a differential amplifier portion ( 4 ) including a first amplifier input connected to a reference voltage ( 16 ), a second amplifier input, and a differential output which is determined by a difference between the reference voltage and a voltage on the second amplifier input; an output portion ( 10 ) arranged to provide a regulator output voltage ( 62 ) which is controlled by the differential output of the amplifier portion, the second amplifier input being connected to or derived from ( 70 ) the regulator output voltage; and a biasing portion ( 8 ) arranged to measure an external load current and to provide a biasing current to the differential amplifier portion which depends on the load current.

First claim

The invention claimed is:

1. A voltage regulator comprising:
a differential amplifier portion including a first amplifier input connected to a reference voltage, a second amplifier input, and a differential output which is determined by a difference between said reference voltage and a voltage on the second amplifier input;
an output portion arranged to provide a regulator output voltage which is controlled by the differential output of the amplifier portion, said second amplifier input being connected to or derived from said regulator output voltage; and
a biasing portion arranged to measure an external load current and to provide a biasing current to the differential amplifier portion which depends on said load current, wherein the biasing portion comprises a biasing resistor and a biasing capacitor arranged to introduce a non-dominant pole that responds to the external load current such that said non-dominant pole is shifted to a higher frequency when the external load current is increased such that unity gain is reached before a second pole.

2. The voltage regulator as claimed in claim 1 , wherein an output capacitor is connected in parallel with the output portion.

3. The voltage regulator as claimed in claim 2 , wherein the output capacitor is provided externally of an integrated circuit device on which the voltage regulator is provided.

4. The voltage regulator as claimed in claim 1 , wherein the biasing portion comprises a mirror transistor arranged to provide a mirror current.

5. The voltage regulator as claimed in claim 1 , wherein the output portion comprises a first divider transistor having a first impedance and a second divider transistor having a second impedance arranged such that the regulator output voltage is a fraction of a supply voltage, said fraction being determined by a ratio of said first and second impedances, at least one of said first and second impedances being controlled by the differential output of the amplifier portion.

6. The voltage regulator as claimed in claim 5 , wherein the biasing portion comprises a mirror transistor arranged to provide a mirror current and the mirror transistor is physically smaller than the first divider transistor.

7. The voltage regulator as claimed in claim 1 , wherein the differential amplifier portion comprises a long-tailed pair arranged such that the gate terminal of a first differential transistor is connected to the first amplifier input and the gate terminal of a second differential transistor is connected to the second amplifier input, wherein the source terminals of the first and second differential transistors are connected to each other.

8. The voltage regulator as claimed in claim 7 , wherein the source terminals of the first and second differential transistors are connected to a tail transistor.

9. The voltage regulator as claimed in claim 8 , wherein the tail transistor is arranged as a current source.

10. The voltage regulator as claimed in claim 7 , wherein the differential amplifier further comprises a first amplifier current mirror connected to the drain terminal of the first differential transistor and a second amplifier current mirror connected to the drain terminal of the second differential transistor.

11. The voltage regulator as claimed in claim 7 , wherein the differential amplifier comprises a first amplifier current mirror connected to the drain terminal of the first differential transistor, wherein the first amplifier current mirror comprises:
a first transistor with its source terminal connected to the supply voltage, and its gate and drain terminals connected to the drain terminal of the first differential transistor; and
a second transistor with its source terminal connected to the supply voltage, and its gate terminal connected to both the drain terminal of the first differential transistor and the gate terminal of the first transistor.

12. The voltage regulator as claimed in claim 11 , wherein the differential amplifier comprises a second amplifier current mirror connected to the drain terminal of the second differential transistor, wherein the second amplifier current mirror comprises:
a third transistor with its source terminal connected to the supply voltage, and its gate and drain terminals connected to the drain terminal of the second differential transistor; and
a fourth transistor with its source terminal connected to the supply voltage, and its gate terminal connected to both the drain terminal of the second differential transistor and the gate terminal of the third transistor.

13. The voltage regulator as claimed in claim 12 , wherein the differential amplifier comprises a third amplifier current mirror including:
a fifth transistor with its drain terminal connected to the drain terminal of the second transistor, and its source terminal connected to ground; and
a sixth transistor with its drain terminal connected to the drain terminal of the fourth transistor, and its source terminal connected to ground,
wherein the gate terminals of the fifth and sixth transistors are connected to one another.

14. The voltage regulator as claimed in claim 13 , wherein the first, second, third, and fourth transistors are p-channel metal-oxide-semiconductor field-effect transistors and the fifth and sixth transistors are n-channel metal-oxide-semiconductor field-effect transistors.

15. The voltage regulator as claimed in claim 1 , wherein the biasing portion comprises an adaptive biasing transistor arranged to provide a controllable biasing current to the differential amplifier portion.

16. The voltage regulator as claimed in claim 1 , comprising a buffer portion.

17. The voltage regulator as claimed in claim 16 , wherein the buffer portion comprises a buffer transistor arranged as a source follower.

Assignees

• Nordic Semiconductor Asa

Inventors

• Dahl Hans Ola

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title

• H03F3/345

  with field-effect devices (H03F3/347 takes precedence) · CPC title

• G05F3/262

  using field-effect transistors only · CPC title

• G05F1/565 Primary

  sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title