Display device and method for detecting bonding condition in bonding area of display device

Patent metadata

Field	Value
Publication number	US-10321559-B2
Application number	US-201615214368-A
Country	US
Kind code	B2
Filing date	Jul 19, 2016
Priority date	Jan 4, 2016
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

The display device comprises a printed circuit board, a display panel and a chip on film for connecting the printed circuit board with the display panel. The chip on film comprises a plurality of output pads and a plurality of first test pads which are close to the plurality of output pads and arranged at intervals. The display panel comprises a plurality of input pads in one-to-one correspondence with the plurality of output pads of the chip on film, and a plurality of second test pads which are close to the plurality of input pads of the display panel and arranged at intervals. A gap between two adjacent first test pads of the chip on film overlaps a second test pad of the display panel such that the two adjacent first test pads of the chip on film are connected via the second test pad of the display panel.

First claim

The invention claimed is:

1. A display device comprising a printed circuit board, a display panel and a chip on film for connecting the printed circuit board with the display panel, the chip on film comprising a plurality of output pads, the display panel comprising a plurality of input pads, each one of the plurality of input pads corresponding to and coupled with a respective output pad of the plurality of output pads, wherein the chip on film further comprises a plurality of first test pads which are spaced from the plurality of output pads of the chip on film and arranged at intervals, the display panel further comprises a plurality of second test pads which are spaced from the plurality of input pads of the display panel and arranged at intervals,
wherein a gap between every two adjacent first test pads of the plurality of first test pads of the chip on film overlaps a respective second test pad of the display panel such that all of the plurality of first test pads of the chip on film are connected via the second test pads of the display panel.

2. The device according to claim 1 , wherein the gap between two adjacent first test pads of the plurality of first test pads of the chip on film has a length smaller than a length of the second test pad of the display panel which overlaps the gap.

3. The device according to claim 2 , wherein the plurality of first test pads or the plurality of second test pads are located on a same line.

4. The device according to claim 3 , wherein the chip on film further comprises a plurality of first test lines, which are connected to at least some of the plurality of first test pads of the chip on film, respectively.

5. The device according to claim 4 , wherein the printed circuit board comprises a plurality of second test lines in one-to-one correspondence with the first test lines of the chip on film.

6. The device according to claim 5 , wherein the printed circuit board further comprises a plurality of test points in one-to-one correspondence with and connected to the second test lines of the printed circuit board.

7. The device according to claim 1 , wherein the second test pads of the display panel are located between a display area and the input pads of the display panel.

8. A method for detecting a bonding condition in a bonding area of a display device as defined in claim 1 , wherein the method comprises:
connecting the display panel with the printed circuit board via the chip on film;
determining whether there is poor bonding in the bonding area for the chip on film and the display panel by means of the first test pads of the chip on film and the second test pads of the display panel.

9. The method according to claim 8 , wherein the gap between two adjacent first test pads of the chip on film has a length smaller than a length of the second test pad of the display panel which overlaps the gap.

10. The method according to claim 9 , wherein the plurality of first test pads or the plurality of second test pads are located on a same line.

11. The method according to claim 10 , wherein the chip on film further comprises a plurality of first test lines, the first test lines being connected to the first test pads of the chip on film.

12. The method according to claim 11 , wherein the printed circuit board comprises a plurality of second test lines in one-to-one correspondence with the first test lines of the chip on film.

13. The method according to claim 12 , wherein the printed circuit board further comprises a plurality of test points in one-to-one correspondence with and connected to the second test lines of the printed circuit board.

14. The method according to claim 8 , wherein the second test pads of the display panel are located between a display area and the input pads of the display panel.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Meng Song
• Song Danna

Classifications

• H05K1/0268 Primary

  for electrical inspection or testing · CPC title

• H05K3/361

  Assembling flexible printed circuits with other printed circuits · CPC title

• H05K1/181

  associated with surface mounted components · CPC title

• H05K1/14

  Structural association of two or more printed circuits (providing electric connection to or between printed circuits H05K1/11, H01R12/00) · CPC title

• H05K2201/10128

  Display · CPC title