Electronic circuit performing gain control and gain compression to improve characteristic of analog output and electronic device including the same

Patent metadata

Field	Value
Publication number	US-10320408-B2
Application number	US-201815862794-A
Country	US
Kind code	B2
Filing date	Jan 5, 2018
Priority date	Jun 19, 2017
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

An electronic circuit includes a peak detector, a gain controller, and a compressor. The peak detector detects a peak level from a digital input. The gain controller outputs a digital gain with regard to increasing the peak level to a target level, The compressor provides the gain controller with a compressed gain which is to be output as the digital gain, based on the detected peak level. In a compression interval where the peak level is greater than a threshold level, the output digital gain increases as the peak level decreases. The compressor generates the compressed gain such that a ratio of an increment of the output digital gain to a decrement of the peak level in the compression interval is less than a reference ratio.

First claim

What is claimed is:

1. An electronic circuit comprising:
a peak detector configured to,
detect a signal level from a digital input, the digital input being in a digital domain, and
detect a peak level of the digital input as a point where the signal level switches from increasing to decreasing;

a gain controller configured to,
set a maximum level of the digital input that is allowable in the digital domain,
determine a target level of the digital input such that the target level is greater than the peak level of the digital input and is less than or equal to the maximum level allowable in the digital domain,
set a digital gain based on a compressed gain such that the digital gain increases the peak level of the digital input to the target level, and
increase, in a compression interval where the peak level is greater than a threshold level, the digital gain as the peak level decreases; and

a compressor configured to set the compressed gain based on the peak level such that, in the compression interval, a ratio of an increment of the digital gain to a decrement of the peak level is less than a reference ratio.

2. The electronic circuit of claim 1 , wherein the peak detector is further configured to,
detect the signal level from the digital input in each sampling period.

3. The electronic circuit of claim 1 , wherein the digital gain corresponds to a difference between the peak level and the target level.

4. The electronic circuit of claim 1 , wherein the reference ratio corresponds to a ratio of an increment of the digital gain to a decrement of the peak level, if the digital gain increases by a same amount that the peak level decreases.

5. The electronic circuit of claim 1 , wherein
in a non-compression interval where the peak level is less than the threshold level, the digital gain increases as the peak level decreases, and
the gain controller is further configured to control generating the digital gain such that a ratio of an increment of the digital gain to a decrement of the peak level in the non-compression interval equals the reference ratio.

6. The electronic circuit of claim 1 , wherein the gain controller is further configured to control generating the digital gain such that the digital gain has a reference gain in a constant mode interval, the constant mode interval being an interval where the peak level is less than the threshold level.

7. The electronic circuit of claim 6 , wherein the gain controller is further configured to,
output, in the compression interval, the compressed gain as the digital gain; and
output, in the constant mode interval, the reference gain as the digital gain.

8. The electronic circuit of claim 6 , wherein, in the compression interval and the constant mode interval, the target level increases as the peak level increases.

9. The electronic circuit of claim 1 , wherein, in a zero-gain interval where the digital gain is zero as the peak level increases and the digital gain decreases in the compression interval, the peak level equals the target level.

10. An electronic circuit comprising:
a peak detector configured to,
detect a signal level from a digital input, the digital input being in a digital domain, and
detect a peak level of the digital input as a point where the signal level switches from increasing to decreasing;

a gain controller configured to,
set a maximum level of the digital input that is allowable in the digital domain,
determine a target level for the digital input such that the target level is greater than the peak level of the digital input and is less than or equal to the maximum level allowable in the digital domain,
set a digital gain based on a compressed gain such that the digital gain increases the peak level to the target level, and
increase the digital gain as the peak level decreases; and

a compressor configured to set the compressed gain based on the peak level such that a first ratio in a first interval is less than a second ratio in a second interval, wherein
the first interval is an interval where the peak level is greater than a threshold level, and the second interval is an interval where the peak level is less than the threshold level, and
the first ratio is a ratio of an increment of the digital gain to a decrement of the peak level in the first interval, and the second ratio is a ratio of an increment of the digital gain to a decrement of the peak level in the second interval.

11. The electronic circuit of claim 10 , wherein the compressor is further configured to set the compressed gain in the first interval such that, when the peak level decreases in the first interval, an increase in the digital gain is less than a decrease in the peak level.

12. The electronic circuit of claim 10 , wherein the gain controller is further configured to control generating the digital gain in the second interval such that, when the peak level decreases in the second interval, the digital gain increases by a same amount as the peak level decreases.

13. The electronic circuit of claim 12 , wherein the gain controller is further configured to:
output, in the first interval, the compressed gain as the digital gain, and
output, in the second interval, the digital gain directly to the gain controller.

14. The electronic circuit of claim 10 , wherein the gain controller is configured to set the digital gain based on the first ratio in the first interval such that the target level increases as the peak level increases in the first interval.

15. The electronic circuit of claim 10 , wherein the gain controller is configured to set the digital gain based on the second ratio in the second interval such that the target level is constantly maintained in the second interval.

16. The electronic circuit of claim 10 , wherein, in a zero-gain interval where the digital gain is zero as the peak level increases and the digital gain decreases in the first interval, the peak level equals the target level.

17. An electronic device comprising:
a memory configured to store data associated with a digital input, the digital input being in a digital domain; and
an output gain controller circuit configured to,
detect a signal level from the digital input,
detect a peak level of the digital input as a point where the signal level switches from increasing to decreasing,
set a maximum level of the digital input that is allowable in the digital domain,
determine a target level for the digital input such that the target level is greater than the peak level of the digital input and is less than or equal to the maximum level allowable in the digital domain, and
set a digital gain such that the electronic device increases the peak level of the digital input to the target level based on the digital gain, wherein
in a compression interval where the peak level is greater than a threshold level, the output gain controller circuit is configured to increase the digital gain as the peak level decreases such that a ratio of an increment of the digital gain to a decrement of the peak level in the compression interval is less than a reference ratio.

18. The electronic device of claim 17 , wherein the electronic device is configured to generate a digital output by increasing the digital input to the target level based on the digital gain, and the output gain controller circuit is further configured to set an analog gain, wherein the electronic device further comprises:
a digital-analog converter circuit configured to convert the digital output to an analog output, and wherein
the electronic device de

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Young-Hun
• Song Yunseob
• Won Jonghwa
• Yeum Wangseup

Classifications

• H03M1/185 Primary

  the determination of the range being based on more than one digital output value, e.g. on a running average, a power estimation or the rate of change · CPC title

• H03G7/08

  incorporating negative feedback · CPC title

• G01R19/04

  Measuring peak values {or amplitude or envelope} of AC or of pulses · CPC title

• H03K5/1532

  Peak detectors (measuring characteristics of individual pulses G01R29/02) · CPC title

• H03G3/3078

  Circuits generating control signals for digitally modulated signals · CPC title