Dynamic power control circuit

Patent metadata

Field	Value
Publication number	US-10320219-B2
Application number	US-201615055479-A
Country	US
Kind code	B2
Filing date	Feb 26, 2016
Priority date	Feb 26, 2016
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

A dynamic power control circuit is provided. The control circuit can detect the presence of the external power source as well as detect one or more conditions of the device. For instance, the control circuit can detect a voltage difference between a first node coupling a first power output and a system circuit and a second node coupling a second power output and the batteries. The control circuit can also detect the activation or deactivation of the external power source. Based on the inputs, the control circuit can cause the controlled resistor to dynamically adjust a level of impedance between the first node and the second node. The controlled impedance between the first node and the second node enables the system circuit to dynamically utilize power supplied by the external power source as well as power supplied by the batteries.

First claim

What is claimed is:

1. An apparatus, comprising:
a system circuit comprising a positive lead for receiving power at a first node from a first output of an external power source;
at least one battery comprising a positive lead for receiving power at a second node from a second output of the external power source;
a controlled resistor comprising a first lead coupled to the first node and a second lead coupled to the second node, the controlled resistor causing a high impedance path between the first node and the second node when the controlled resistor is off, the controlled resistor causing a low impedance path between the first node and the second node when the controlled resistor is on, the controlled resistor further comprising an input for turning the controlled resistor on or off; and
a control circuit having a first input coupled to the first node, a second input coupled to the second node, a logical input coupled to a component configured to cause a logical signal at the logical input indicating that the external power source is active or inactive, and the control circuit comprising a control output coupled to the input of the controlled resistor,
the control circuit causing the controlled resistor to be on when the logical signal at the logical input indicates that the external power source is inactive,
the control circuit causing the controlled resistor to be off when the logical signal at the logical input indicates that the external power source is active, and when a first signal at the first input and a second signal at the second input fulfill a first criteria, wherein the first criteria are fulfilled when a voltage of the first signal is within a first threshold of a voltage of the second signal, and
the control circuit causing the controlled resistor to be on when the logical signal at the logical input indicates that the external power source is active, and when the first signal at the first input and the second signal at the second input fulfill a second criteria, wherein the second criteria are fulfilled when the voltage of the first signal is below the voltage of the second signal by at least a second threshold.

2. The apparatus of claim 1 , wherein the first criteria are fulfilled when a voltage of the first signal is within a first threshold of a voltage of the second signal, wherein the second criteria are fulfilled when the voltage of the first signal is below the voltage of the second signal by at least a second threshold.

3. The apparatus of claim 2 , when the voltage of the first signal is below the voltage of the second signal, the control circuit causes the controlled resistor to gradually transition from the high impedance path between the first node and the second node to the low impedance path between the first node and the second node as a difference between the voltage of the first signal and the voltage of the second signal increases.

4. The apparatus of claim 2 , wherein the first threshold and the second threshold are within a range of zero volts to one hundred millivolts.

5. The apparatus of claim 2 , wherein the first threshold and the second threshold are within a range of 35 millivolts to 45 millivolts.

6. The apparatus of claim 2 , when the voltage of the first signal is below the voltage of the second signal, the control circuit causes the controlled resistor to vary a level of impedance between the first node and the second node to maintain a predetermined voltage difference between the voltage of the first signal and the voltage of the second signal.

7. The apparatus of claim 1 , wherein the first criteria are fulfilled when a current between the external power source and the system circuit is below a threshold, and wherein the second criteria are fulfilled when the current between the external power source and the system circuit above the threshold.

8. The apparatus of claim 1 , wherein the first criteria are fulfilled when a current between the external power source and the at least one battery is flowing in a first direction, and wherein the second criteria are fulfilled when the current between the external power source and the at least one battery is flowing in a second direction.

9. The apparatus of claim 1 , wherein the controlled resistor comprises a field-effect transistor, wherein a gate of the transistor is coupled to the control output of the control circuit, a source of the field-effect transistor is coupled to the first node, and a drain of the field-effect transistor is coupled to the second node.

10. The apparatus of claim 9 , wherein the control circuit causes the field-effect transistor to control a level of impedance between the second node and the first node to maintain a threshold voltage difference between the first node and second node.

Assignees

• Microsoft Technology Licensing Llc

Inventors

• Dutra Jonathan Alan
• Penny Junius Mark
• Wyland David Carl
• Lukofsky David
• Mehta Agustya Ruchir

Classifications

• H02J7/663 Primary

  using battery or load disconnect circuits (H02J9/002 takes precedence) · CPC title

• H02J7/963 Primary

  in response to battery voltage gradient · CPC title

• H02J7/0081 Primary

  Electricity · mapped topic

• H02J7/0031

  Electricity · mapped topic