Dual bus battery balancing system

Patent metadata

Field	Value
Publication number	US-10319981-B2
Application number	US-201715440607-A
Country	US
Kind code	B2
Filing date	Feb 23, 2017
Priority date	Feb 23, 2016
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

A battery balancing system for parallel connected batteries for balancing batteries that are at dissimilar voltages. The system has first and second buses, connected by a current limiter. A high bus takes energy from the highest voltage battery or batteries in the system and transfers the energy through the current limiter to the low bus, which in turn delivers energy to the lowest voltage battery or batteries in the system.

First claim

What is claimed is:

1. A system for balancing voltage of batteries connected in parallel, the system comprising:
a first battery having a first positive terminal, a first negative terminal, a first high bus terminal, and a first low bus terminal;
a second battery having a second positive terminal, a second negative terminal, a second high bus terminal, and a second low bus terminal;
a third battery having a third positive terminal, a third negative terminal, a third high bus terminal, and a third low bus terminal;
a fourth battery having a fourth positive terminal, a fourth negative terminal, a fourth high bus terminal, and a fourth low bus terminal;
a high bus, the high bus electrically connected to each of the first, second, third, and fourth batteries at the first, second, third, and fourth high bus terminals, respectively;
a low bus, the low bus electrically connected to each of the first, second, third, and fourth batteries at the first, second, third, and fourth low bus terminals, respectively; and
a current limiter electrically connecting the high bus and the low bus,
wherein, each of the first, second, third, and fourth batteries is configured such that when at least one of the first, second, third, and fourth batteries differs in voltage level from another of the first, second, third, and fourth batteries, the high bus receives charge from the battery with the highest voltage level from among the first, second, third, and fourth batteries, the low bus receives charge from the high bus across the current limiter, and the battery with the lowest voltage level receives charge from the low bus until each of the first, second, third, and fourth batteries reaches the same voltage level as the others of the first, second, third, and fourth batteries.

2. A system as in claim 1 , wherein each of the first, second, third, and fourth batteries is electrically connected to the high bus with a high bus diode configured to not allow current to flow from the high bus to the first, second, third, and fourth batteries.

3. A system as in claim 2 , wherein each of the first, second, third, and fourth batteries is electrically connected to the low bus with a low bus diode configured to not allow current to flow from each of the first, second, third, and fourth batteries to the low bus.

4. A system as in claim 1 , wherein when the first and second batteries are both at a high voltage level and the high voltage level is at a higher voltage than the high bus, the high bus receives charge from both the first and second batteries.

5. A system as in claim 4 , wherein when the first battery is at first voltage level, and the second battery is at a second voltage level lower than the first voltage level, and both the first and second voltage levels are higher than a voltage of the high bus, the high bus receives charge from the first battery and not the second battery.

6. A system as in claim 5 , wherein when the third battery is at a third voltage level, and the fourth battery is at a fourth voltage level lower than the third voltage level, and both the third and fourth voltage levels are lower than a voltage level of the low bus, the fourth battery receives charge from the low bus and the third battery does not receive charge from the low bus.

7. A system as in claim 1 , wherein when first, second, third, and fourth positive terminals and negative terminals are connected to each other and to a load that is powered by the first, second, third, and fourth batteries.

8. A system as in claim 1 , wherein the current limiter comprises a switching power converter.

9. A system as in claim 8 , wherein the current limiter comprises a positive temperature coefficient fuse.

10. A system as in claim 1 , further comprising a battery management system that monitors characteristics of cells of the batteries and controls power to the first, second, third, and fourth positive terminals and the first, second, third, and fourth negative terminals of the first, second, third, and fourth batteries.

11. A system as in claim 10 , wherein the battery management system is configured to prevent energy flow to the first, second, third, and fourth positive and negative terminals of the first, second, third, and fourth batteries if a difference between a voltage of an internal cell-stack voltage and a voltage of either at least one of the first, second, third, and fourth positive or negative terminals exceeds a threshold.

12. A system as in claim 2 , wherein at least one of the high bus diodes comprises an ideal active diode element.

13. A system as in claim 3 , wherein at least one of the low bus diodes comprises an ideal active diode element.

Assignees

• Revision Military Sarl

Inventors

• Carkner Steve
• Andrasi Eric John Georges
• Lynes Paul

Classifications

• H02J7/62

  against overcurrent · CPC title

• H02J7/751

  concerning the insertion or the connection of the batteries · CPC title

• H02J7/65

  against overtemperature · CPC title

• H02J7/54 Primary

  Passive balancing, e.g. using resistors or parallel MOSFETs · CPC title

• H01M50/505

  comprising a single busbar · CPC title