Secure crypto module including optical glass security layer

Patent metadata

Field	Value
Publication number	US-10318462-B2
Application number	US-201615080120-A
Country	US
Kind code	B2
Filing date	Mar 24, 2016
Priority date	Mar 24, 2016
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.

First claim

What is claimed is:

1. A cryptographic printed circuit board (PCB) comprising:
a crypto component protected by a glass security layer;
an optical electromagnetic radiation (EM) emitter upon the glass security layer;
an optical EM receiver upon the glass security layer; and
a destruct feature within the crypto component and electrically connected to the optical EM receiver, wherein the destruct feature is programmed in response to the optical EM receiver receiving a predetermined threshold decrease of optical flux of optical EM transmitted from the optical EM emitter to the optical EM receiver by the glass security layer.

2. The cryptographic PCB of claim 1 , further comprising:
an optical monitor device that generates a tamper signal in response to the optical EM receiver receiving the predetermined threshold decrease in optical flux transmitted from the optical EM emitter to the optical EM receiver by the glass security layer.

3. The cryptographic PCB of claim 2 , further comprising:
an enable device that, upon receipt of the tamper signal from the monitor device, programs the destruct feature.

4. The cryptographic PCB of claim 1 , further comprising:
an optically opaque encapsulation layer upon the glass security layer.

5. The cryptographic PCB of claim 1 , wherein glass security layer is a layer of toughened glass.

6. The cryptographic PCB of claim 1 , wherein the glass security layer is a perimeter layer of the PCB.

7. The cryptographic PCB of claim 1 , wherein a majority of the surface area of the glass security layer shatters as a result of an unauthorized physical access thereto.

8. The cryptographic PCB of claim 1 , wherein optical EM is transmitted by the glass security layer by total internal reflection.

9. A cryptographic printed circuit board (PCB) comprising:
a crypto component protected by a glass security layer;
an optical electromagnetic radiation (EM) emitter upon the glass security layer;
an optical EM receiver upon the glass security layer; and
a destruct feature within the crypto component and electrically connected to the optical EM receiver, wherein the destruct feature is programmed when the optical EM receiver detects that an interference pattern of optical EM emitted from the optical EM emitter and transmitted by the glass security layer is different from a predetermined expected optical EM interference pattern.

10. The cryptographic PCB of claim 1 , further comprising:
an optical monitor device that generates a tamper signal in response to the optical EM receiver detecting the interference pattern of optical EM emitted from the optical EM emitter and transmitted by the glass security layer is different from the predetermined expected optical EM interference pattern.

11. The cryptographic PCB of claim 2 , further comprising:
an enable device that, upon receipt of the tamper signal from the monitor device, programs the destruct feature.

12. The cryptographic PCB of claim 1 , further comprising:
an optically opaque encapsulation layer upon the glass security layer.

13. The cryptographic PCB of claim 1 , wherein glass security layer is a layer of toughened glass.

14. The cryptographic PCB of claim 1 , wherein the glass security layer is a perimeter layer of the PCB.

15. The cryptographic PCB of claim 1 , wherein a majority of the surface area of the glass security layer shatters as a result of an unauthorized physical access thereto.

16. The cryptographic PCB of claim 1 , wherein the optical EM is transmitted by the glass security layer by total internal reflection.

Assignees

• IBM

Inventors

• Bartley Gerald K
• Becker Darryl J
• Doyle Matthew S
• Jeanson Mark J
• Maxson Mark O

Classifications

• H04L9/004

  for fault attacks · CPC title

• G06F13/4068 Primary

  Electrical coupling · CPC title

• G09C1/00

  Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system (cryptographic typewriters G09C3/00) · CPC title

• H04B10/80

  Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups H04B10/03 - H04B10/70, e.g. optical power feeding or optical transmission through water · CPC title