Sharing and persisting code caches

US10318256B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10318256-B2
Application numberUS-201213686009-A
CountryUS
Kind codeB2
Filing dateNov 27, 2012
Priority dateJun 6, 2008
Publication dateJun 11, 2019
Grant dateJun 11, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Computer code from an application program comprising a plurality of modules that each comprise a separately loadable file is code cached in a shared and persistent caching system. A shared code caching engine receives native code comprising at least a portion of a single module of the application program, and stores runtime data corresponding to the native code in a cache data file in the non-volatile memory. The engine then converts cache data file into a code cache file and enables the code cache file to be pre-loaded as a runtime code cache. These steps are repeated to store a plurality of separate code cache files at different locations in non-volatile memory.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus for caching computer code from an application program comprising a plurality of modules that each comprise a separately loadable file, the apparatus comprising: (a) a volatile memory; (b) a non-volatile memory coupled to the volatile memory via a first bus; (c) a processor coupled to the non-volatile memory via a second bus; (d) an address bus connecting the processor and the non-volatile memory for delivering code request signals from the processor to the non-volatile memory; (e) a non-volatile memory controller responsive to the code request signals for transferring requested code from the non-volatile memory to the processor if the requested code is stored in cache code files in the non-volatile memory; (f) a volatile memory controller responsive to the code request signal for transferring the requested code from the volatile memory to the processor via the non-volatile memory if the requested code is not stored in cache code files in the non-volatile memory; and (g) a shared code caching engine coupled to receive executed native code output from the volatile memory via the first bus, the executed native code comprising at least a portion of a module of the application program, and the shared code caching engine comprising code instruction sets for: (i) storing data corresponding to the executed native code in a plurality of cache data files at different locations in the non-volatile memory, wherein a cache data file contains runtime data corresponding to the executed native code, and (ii) using the plurality of separate cache data files to enable pre-loading of a runtime code cache in the volatile memory, the runtime code cache being a software-managed cache. 2. A method of caching computer code from an application program comprising a plurality of modules that each comprise a separately loadable file, the method performed on a computer system comprising non-volatile memory and volatile memory, the method comprising: (a) receiving native code comprising at least a portion of a module of the application program; (b) storing runtime data corresponding to the native code in a cache data file in non-volatile memory; (c) converting the cache data file into a code cache file, wherein converting includes processing the runtime data in the cache data file to determine contents of the code cache file, and the contents of the code cache file include the native code from at least a portion of a module of the application program, the code cache file including at least one read-only section that can be switched to a writable section when a link to a target outside the code cache file is called at runtime and switched back to a read-only section after performing the link; (d) enabling the code cache file to be pre-loaded as a runtime code cache, the runtime code cache being a software-managed cache; and (e) repeating (a) through (d), to store a plurality of separate code cache files at different locations in the non-volatile memory. 3. An apparatus for caching computer code from an application program comprising a plurality of modules that each comprise a separately loadable file, the apparatus comprising: (a) a processor; (b) a non-volatile memory; (c) a volatile memory; and (d) a shared code caching engine comprising code instruction sets for: (i) receiving native code comprising at least a portion of a module of the application program; (ii) storing runtime data corresponding to the native code in a cache data file in non-volatile memory; (iii) converting the cache data file into a code cache file, wherein converting includes processing runtime data in the cache data file to determine contents of the code cache file, and the contents of the code cache file include native code corresponding to a portion of the application program, the code cache file including at least one read-only section that can be switched to a writable section when a link to another code cache file is called at runtime; (iv) enabling the code cache file to be pre-loaded as a runtime code cache, the runtime code cache being a software-managed cache; and (v) repeating (i) through (iv), to store a plurality of separate code cache files at different locations in the non-volatile memory. 4. A method of caching computer code from an application program, the method comprising: (a) receiving a plurality of blocks of native code from the application program; and (b) selecting for each block of native code, a code caching scheme for storing runtime data in a cache data file corresponding to the block of native code, from at least two different code caching schemes that each comprise a different demarcation of the runtime data into separable divisions of runtime data that can each be individually removed, replaced, or have their entrances or exits modified. 5. The method according to claim 4 further comprising: (c) monitoring each block of native code for changes to the native code; (d) upon detecting a change in the native code of the application program, removing or replacing the runtime data, or replacing the exits from the separable divisions of runtime data that corresponds to the changed computer code; (e) monitoring the data processing efficiency level obtained from the selected code caching scheme by measuring the amount of cached computer code that is removed or replaced; (f) determining whether to switch to a different code caching scheme in relation to the monitored data processing efficiency level; and (g) repeating (a) through (f) to allow dynamic selection of an efficient scheme for storing runtime data. 6. The method according to claim 4 wherein the application program comprises a plurality of modules that each comprise a separately loadable file, and wherein the code caching schemes comprise: (i) a fine-grain scheme in which each separable division comprises a block of native code having a single entry point at the start of the block; and (ii) a coarse-grain scheme in which each separable division comprises runtime data corresponding to native code from a single module of the application program. 7. The method according to claim 6 wherein the fine-grain scheme uses a plurality of data structures for each block of received native code. 8. The method according to claim 6 wherein the coarse grained scheme uses data structures per module and does not use data structures per block. 9. The method according to claim 5 wherein (e) comprises monitoring the data processing efficiency level by determining the number of code modifications performed in (d). 10. The method according to claim 5 comprising switching the code caching scheme when the number of code modifications exceeds a threshold value. 11. The method according to claim 4 comprising using different code caching schemes for different blocks of native code. 12. An apparatus for caching computer code from an application program comprising a plurality of modules that each comprise a separately loadable file, the apparatus comprising: (a) a processor; (b) a non-volatile memory; (c) a volatile memory; and (d) a shared code caching engine comprising code instruction sets for: (i) receiving a plurality of blocks of native code from the application program; and (ii) selecting a code caching scheme for storing runtime data in a cache data file corresponding to the blocks of native code, from at least two different code caching schemes that each comprise a different demarcation of the runtime data into separable divisions of runtime data that can each be individually removed, replaced, or have their entrances or exits modified. 13. A method of caching comp

Assignees

Inventors

Classifications

  • with prefetch · CPC title

  • in a hierarchical protection system, e.g. privilege levels, memory rings · CPC title

  • G06F8/41Primary

    Compilation · CPC title

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What does patent US10318256B2 cover?
Computer code from an application program comprising a plurality of modules that each comprise a separately loadable file is code cached in a shared and persistent caching system. A shared code caching engine receives native code comprising at least a portion of a single module of the application program, and stores runtime data corresponding to the native code in a cache data file in the non-v…
Who is the assignee on this patent?
Vmware Inc
What technology area does this patent fall under?
Primary CPC classification G06F12/0862. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 11 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).