Data operating method, device, and system

Patent metadata

Field	Value
Publication number	US-10318165-B2
Application number	US-201615357408-A
Country	US
Kind code	B2
Filing date	Nov 21, 2016
Priority date	May 21, 2014
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

A data operating method, device, and system are provided. The method includes: receiving an operation instruction sent by a CPU; when the operation instruction is a read instruction, reading a first data block in the block device and returning to-be-read data in the first data block to the CPU; or when the operation instruction is a write instruction, writing, into a cache, to-be-written data indicated by the write instruction, and writing, into the block device, a second data block that includes the to-be-written data. The method is used to operate data in a block device.

First claim

What is claimed is:

1. A method, comprising:
receiving, by a storage control device, a write instruction sent by a central processing unit (CPU), wherein the write instruction indicates first to-be-written data and is used to perform a data write operation on a block device, and wherein the write instruction comprises data content of the first to-be-written data and write address information of the first to-be-written data in the block device;
obtaining the data content and the write address information of the first to-be-written data from the write instruction;
after obtaining the data content and the write address information, writing the data content of the first to-be-written data to a cache of the storage control device and writing the write address information of the first to-be-written data to the cache of the storage control device; and
generating a first data block that comprises the first to-be-written data, and writing the first data block into the block device.

2. The method according to claim 1 , wherein generating the first data block that comprises the first to-be-written data comprises:
reading, from the block device according to the write address information of the first to-be-written data, a second data block corresponding to the write address information, and combining the second data block and the first to-be-written data into the first data block, wherein the second data block is a data block that is stored in the block device and into which the first to-be-written data is to be written.

3. The method according to claim 1 , wherein generating the first data block that comprises the first to-be-written data comprises:
determining that historical to-be-written data and the first to-be-written data that are stored in the cache meet a data block generating condition, wherein the historical to-be-written data is second to-be-written data that is not written into the block device and that is stored in the cache before the first to-be-written data is written into the cache; and
generating the first data block using the historical to-be-written data and the first to-be-written data.

4. The method according to claim 3 , wherein determining that the historical to-be-written data and the first to-be-written data that are stored in the cache meet the data block generating condition comprises:
determining that write address information of the historical to-be-written data and the write address information of the first to-be-written data are consecutive, and that a total data size of the historical to-be-written data and the first to-be-written data accords with a block granularity for writing data into the block device.

5. The method according to claim 1 , wherein before writing the first to-be-written data indicated by the write instruction, the method further comprises:
determining to-be-replaced data in the cache when no idle space exists in the cache, and writing the to-be-replaced data into the block device, wherein the to-be-replaced data is historical to-be-written data stored in the cache.

6. The method according to claim 1 , wherein a total data size of the first to-be-written data is less than 512 bytes, and wherein a block granularity of the block device is greater than or equal to 512 bytes.

7. A storage control device, comprising:
a cache configured to cache data;
a memory configured to store instructions; and
a processor coupled to the memory and configured to execute the instructions to
receive a write instruction indicating first to-be-written data, the write instruction being sent by a central processing unit (CPU), wherein the write instruction is used to perform a data write operation on a block device, and wherein the write instruction comprises data content of the first to-be-written data and write address information of the first to-be-written data in the block device,
obtain the data content and the write address information of the first to-be-written data from the write instruction,
after obtaining the data content and the write address information, write the data content of the first to-be-written data to the cache and write the write address information of the first to-be-written data to the cache, and
generate a first data block that comprises the first to-be-written data, and write the first data block into the block device.

8. The device according to claim 7 , wherein the processor is further configured to execute the instructions to:
read a second data block from the block device according to the write address information of the first to-be-written data, and combine the second data block and the first to-be-written data into the first data block, wherein the second data block is a data block that is stored in the block device and into which the first to-be-written data is to be written.

9. The device according to claim 7 , wherein the processor is further configured to execute the instructions to:
determine that historical to-be-written data and the first to-be-written data that are stored in the cache meet a data block generating condition, wherein the historical to-be-written data is second to-be-written data that is not written into the block device and that is stored in the cache before the first to-be-written data is written into the cache; and
generate the first data block using the historical to-be-written data and the first to-be-written data.

10. The device according to claim 9 , wherein the processor is further configured to execute the instructions to:
determine that write address information of the historical to-be-written data and the write address information of the first to-be-written data are consecutive, and that a total data size of the historical to-be-written data and the first to-be-written data accords with a block granularity for writing data into the block device.

11. The device according to claim 7 , wherein the processor is further configured to execute the instructions to:
determine to-be-replaced data in the cache when no idle space exists in the cache, and write the to-be-replaced data into the block device, wherein the to-be-replaced data is historical to-be-written data stored in the cache.

12. The device according to claim 7 , wherein, wherein a total data size of the first to-be-written data is less than 512 bytes, and wherein a block granularity of the block device is greater than or equal to 512 bytes.

13. A system, comprising:
a central processing unit (CPU), configured to send a write instruction, wherein the write instruction indicates first to-be-written data and is used to perform a data write operation on a block device, and wherein the write instruction comprises data content of the first to-be-written data and write address information of the first to-be-written data in the block device; and
a storage control device, configured to
receive the write instruction sent by the CPU,
obtain the data content and the write address information of the first to-be-written data from the write instruction,
after obtaining the data content and the write address information, write the data content of the first to-be-written data to a cache of the storage control device and write the write address information of the first to-be-written data to the cache, and
generate a first data block that comprises the first to-be-written data, and write the first data block into the block device.

14. The system according to claim 13 , wherein, wherein a total data size of the first to-be-written data is less than 512 bytes, and wherein a block granularity of the block device is greater than or equal to 512 bytes.

15. A method, compris

Assignees

• Huawei Tech Co Ltd

Inventors

• Xia Fei
• Chen Mingyu
• Jiang Dejun
• Xiong Jin

Classifications

• G06F12/0871

  Allocation or management of cache space · CPC title

• G06F12/121

  using replacement algorithms · CPC title

• G06F2212/312

  In storage controller · CPC title

• G06F12/0868

  Data transfer between cache memory and other subsystems, e.g. storage devices or host systems · CPC title

• G06F2212/1016

  Performance improvement · CPC title