Data processing apparatus, data processing method, and storage medium

Patent metadata

Field	Value
Publication number	US-10313547-B2
Application number	US-201615162362-A
Country	US
Kind code	B2
Filing date	May 23, 2016
Priority date	May 29, 2015
Publication date	Jun 4, 2019
Grant date	Jun 4, 2019

Abstract

A data processing apparatus includes an input unit to read out data of a first area of image data from an external memory, sequentially interpret commands included in a command list, and transmit the data of the first area to an image processing unit according to the command, and an output unit to receive data obtained by performing a image processing on the data of the first area and write the received data in the external memory, whereon, based on a control signal, the input unit controls readout of a following command to a command indicating suspension from the external memory and continuation, etc., of transmission of the data of a second area, and based on a control signal, the output unit controls, in a case that the command indicating suspension is received, continuation, etc., of writing of the data of the second area to the external memory.

First claim

What is claimed is:

1. A data processing apparatus comprising:
a processor; and
a memory storing instructions that, when executed by the processor, cause the processor to perform operations comprising:
reading out data of a first area of image data to be subjected to image processing from an external memory, sequentially interpreting a plurality of commands included in a command list obtained from the external memory, and transmitting the data of the first area to an image processing circuit according to the command; and
receiving data obtained by performing the image processing on the data of the first area from the image processing circuit and writing the received data in the external memory according to the command,
wherein, based on a control signal indicating that data of a second area following to the data of the first area can be read out from the external memory,
reading out data comprises controlling readout of a following command to a command indicating suspension from the external memory and continuation, suspension, or restart of transmission of the data of the second area, and
based on a control signal indicating that the data of the second area following to the data of the first area can be read out from the external memory,
receiving data comprises controlling, in a case that the command indicating suspension is received, continuation, suspension, or restart of writing of the data of the second area to the external memory.

2. The data processing apparatus according to claim 1 , wherein a barrier synchronization is realized by suspension of transmission of a command and reception of the control signal.

3. The data processing apparatus according to claim 1 , wherein, in a case that the command indicating suspension instructs external synchronization, reading out data comprises releasing suspension of transmission of the following command according to a register setting from external.

4. The data processing apparatus according to claim 1 , wherein, in a case that the command indicating suspension instructs a Jump, reading out data comprises releasing suspension of transmission of the following command according to a number of Jump times set from external.

5. The data processing apparatus according to claim 1 , wherein, in a case that the command indicating suspension instructs a Jump, reading out data comprises determining whether a Jump operation is executed or not according to the number of Jump times set from external.

6. The data processing apparatus according to claim 5 , wherein whether processing on a following command to the command indicating suspension is performed or not is determined according to whether the Jump operation is executed or not.

7. The data processing apparatus according to claim 1 , wherein reading out data comprises including a temporary storage unit of a plurality of banks and in parallel performing obtainment and transmission of the command list, and receiving data comprises including a temporary storage unit of the plurality of banks and in parallel performing reception and write-down of the data.

8. The data processing apparatus according to claim 7 , wherein a different command is inserted between the command indicating suspension and a preceding command in response to a size of the temporary storage unit, and the preceding command is written down to a memory.

9. The data processing apparatus according to claim 1 , wherein reading out data comprises reading out data by a direct memory access controller (DMAC).

10. The data processing apparatus according to claim 1 , wherein receiving data comprises receiving data by a DMAC.

11. The data processing apparatus according to claim 1 , wherein the image data is image data read by a scanner.

12. The data processing apparatus according to claim 1 , wherein reading out data comprises obtaining the command list from the external memory at a data amount in a predetermined unit.

13. The data processing apparatus according to claim 1 , wherein clock supply is suppressed based on the command indicating suspension and the control signal.

14. The data processing apparatus according to claim 1 , wherein a clock of a frequency selected from a plurality of frequencies is supplied based on the command indicating suspension and the control signal.

15. The data processing apparatus according to claim 13 , wherein suppression of the clock supply is released based on the control signal.

16. The data processing apparatus according to claim 13 , wherein suppression of the clock supply is released based on the control signal after a lapse of a specified restoration cycle.

17. An image processing method for causing a computer to perform operations included in a data processing apparatus according to claim 1 .

18. A non-transitory computer-readable storage medium storing therein a program for causing a computer to perform operations included in a data processing apparatus according to claim 1 .

Assignees

• Canon Kk

Inventors

• Ito Tadayuki

Classifications

• H04N1/36 Primary

  for synchronising or phasing transmitter and receiver · CPC title

• H04N2201/0081

  Image reader (H04N2201/0091 - H04N2201/0094 take precedence) · CPC title

• H04N1/00965 Primary

  using a plug-in memory module, e.g. memory card, memory stick · CPC title

• H04N1/04

  Scanning arrangements {, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa}(H04N1/387 takes precedence) · CPC title

• H04N1/32443

  with asynchronous operation of the image input and output devices connected to the memory · CPC title