Level shifter

Patent metadata

Field	Value
Publication number	US-10312913-B2
Application number	US-201715722449-A
Country	US
Kind code	B2
Filing date	Oct 2, 2017
Priority date	Oct 17, 2016
Publication date	Jun 4, 2019
Grant date	Jun 4, 2019

Abstract

The present disclosure provides a level shifter including: a level shifter section that is driven by a first power source voltage, and that, in accordance with switching of an input signal of a voltage lower than the first power source voltage, switches an output signal that has been level-shifted, from the first power source voltage to a voltage lower than the first power source voltage; and a threshold voltage changing circuit that, in accordance with a switching direction of the input signal, changes a threshold voltage of the input signal for switching the output signal.

First claim

What is claimed is:

1. A level shifter comprising:
a level shifter section that is driven by a first power source voltage, and that, in accordance with switching of an input signal of a voltage lower than the first power source voltage, switches an output signal that has been level-shifted, from the first power source voltage to a voltage lower than the first power source voltage; and
a threshold voltage changing circuit that, in accordance with a switching direction of the input signal, changes a threshold voltage of the input signal for switching the output signal,
wherein the level shifter section includes a differential amplifier circuit and a current mirror circuit, and
wherein the threshold voltage changing circuit includes:
a constant current source having an input connected to the first power source voltage;
a first transistor having a first electrical conductivity type and having a first main electrode connected to an output of the constant current source, a second main electrode connected to a second power source voltage having a voltage lower than the first power source voltage, and a first control electrode connected to a node between an output terminal where the output signal is output and the differential amplifier circuit; and
a second transistor having a second electrical conductivity type opposite to that of the first electrical conductivity type and having a third main electrode connected to the differential amplifier circuit, a fourth main electrode connected to the differential amplifier circuit and the output terminal, and a second control electrode connected to a node between the output of the constant current source and the first main electrode.

2. The level shifter of claim 1 , wherein the threshold voltage changing circuit is a hysteresis circuit exhibiting hysteresis characteristics with respect to changes in a voltage of the output signal in response to changes in the voltage of the input signal.

3. The level shifter of claim 1 , wherein
the differential amplifier circuit includes:
a third transistor having a fifth main electrode connected to the first power source voltage, a sixth main electrode connected to the second power source voltage, and a third control electrode connected via a resistor to an input terminal to which the input signal is input,
a fourth transistor having a seventh main electrode connected to the first power source voltage and an eighth main electrode connected to a fourth control electrode of the fourth transistor and to the output terminal, and
a fifth transistor having the first electrical conductivity type and having a ninth main electrode connected to the eighth main electrode and the output terminal and a tenth main electrode connected to the second power source voltage; and
the current mirror circuit includes:
the fifth transistor, and
a sixth transistor having the first electrical conductivity type and having an eleventh main electrode connected to the first power source voltage, a twelfth main electrode connected to the second power source voltage, and a sixth control electrode connected to a fifth control electrode of the fifth transistor.

4. The level shifter of claim 1 , wherein:
the constant current source and the second transistor are configured by an offset transistor, and
the first transistor is configured by a vertical diffused transistor.

5. The level shifter of claim 1 , further comprising a clamp section that limits the amplitude of the output signal.

Assignees

• Tokai Rika Co Ltd

Inventors

• Matsubara Junichi

Classifications

• H03K19/01831

  with at least one differential stage · CPC title

• H03K19/00307

  in bipolar transistor circuits · CPC title

• H03K19/017518

  using a combination of bipolar and field effect transistors [BIFET] · CPC title

• H03K5/082

  with an adaptive threshold · CPC title

• H03K19/0813 Primary

  Threshold logic · CPC title