Variable gain amplifier, correction method and receiving device

Patent metadata

Field	Value
Publication number	US-10312877-B2
Application number	US-201715672637-A
Country	US
Kind code	B2
Filing date	Aug 9, 2017
Priority date	Sep 23, 2016
Publication date	Jun 4, 2019
Grant date	Jun 4, 2019

Abstract

To provide a variable gain amplifier capable of correcting a DC offset voltage through simpler control even when a gain thereof is changed. A differential output type variable gain amplifier is equipped with a first voltage correction unit coupled to a preceding stage of a variable gain amplifier circuit and for outputting a first correction voltage to correct a potential difference generated between a first conductor provided with a first input resistor and a second conductor provided with a second input resistor, and a second voltage correction unit coupled to a subsequent stage of the variable gain amplifier circuit and for correcting a differential output. A control unit is configured to control the first correction voltage and a correction amount of a potential difference by the second voltage correction unit and thereby attenuate a DC offset voltage included in the differential output.

First claim

What is claimed is:

1. A variable gain amplifier comprising:
a differential amplifier circuit including an inversion input terminal, a non-inversion input terminal, an inversion output terminal, and a non-inversion output terminal;
first and second feedback resistors respectively coupled between the inversion output terminal and the non-inversion input terminal and between the non-inversion output terminal and the inversion input terminal;
first and second input resistors respectively coupled to the inversion input terminal and the non-inversion input terminal;
a control unit for controlling resistance values of the first and second feedback resistors or resistance values of the first and second input resistors to control a gain;
a first voltage correction unit coupled to a preceding stage of the first and second input resistors and for outputting a first correction voltage to correct a potential difference generated between a first conductor provided with the first input resistor and a second conductor provided with the second input resistor; and
a second voltage correction unit coupled to the inversion output terminal and the non-inversion output terminal and for correcting a potential difference generated between a third conductor coupled to the inversion output terminal and a fourth conductor coupled to the non-inversion output terminal,
wherein the control unit is configured to control the first correction voltage and a correction amount of the potential difference by the second voltage correction unit and thereby attenuate a DC offset voltage generated between the inversion output terminal and the non-inversion output terminal,
wherein the DC offset voltage includes a first offset voltage which depends on the gain, and a second offset voltage which does not depend on the gain,
wherein the control unit is configured to attenuate the first offset voltage of the DC offset voltage by the first correction voltage, and
wherein the control unit is configured to attenuate the second offset voltage of the DC offset voltage by the correction amount of the potential difference by the second voltage correction unit.

2. The variable gain amplifier according to claim 1 ,
wherein the control unit is configured to set the correction amount of the potential difference by the second voltage correction unit in a state in which the control unit controls the gain in such a manner that the second offset voltage becomes sufficiently larger than the first offset voltage, and
wherein the control unit is configured to set the first correction voltage in a state in which the control unit controls the gain in such a manner that the first offset voltage becomes sufficiently larger than the second offset voltage.

3. The variable gain amplifier according to claim 2 , wherein the control unit is configured to set the first correction voltage after the correction amount of the potential difference by the second voltage correction unit is set.

4. The variable gain amplifier according to claim 1 ,
further comprising a short-circuit element arranged in a preceding stage of the first voltage correction unit and for short-circuiting the first conductor and the second conductor,
wherein the control unit is configured to short-circuit the first conductor and the second conductor by the short-circuit element when at least the first correction voltage is set.

5. The variable gain amplifier according to claim 1 , wherein the second voltage correction unit is configured to output a second correction voltage and thereby correct the potential difference generated between the third conductor and the fourth conductor.

6. The variable gain amplifier according to claim 1 , wherein the second voltage correction unit includes:
an A/D converter which converts the potential difference generated between the third conductor and the fourth conductor into a digital signal; and
a processor which processes the digital signal so as to correct the potential difference generated between the third conductor and the fourth conductor.

7. A method for attenuating a DC offset voltage generated in a variable gain amplifier including a differential amplifier circuit having an inversion input terminal, a non-inversion input terminal, an inversion output terminal, and a non-inversion output terminal; first and second feedback resistors respectively coupled between the inversion output terminal and the non-inversion input terminal and between the non-inversion output terminal and the inversion input terminal; and first and second input resistors respectively coupled to the inversion input terminal and the non-inversion input terminal, comprising:
controlling resistance values of the first and second feedback resistors or resistance values of the first and second input resistors to control a gain;
outputting a first correction voltage to correct a potential difference generated between a first conductor provided with the first input resistor and a second conductor provided with the second input resistor; and
correcting a potential difference generated between a third conductor coupled to the inversion output terminal and a fourth conductor coupled to the non-inversion output terminal,
wherein the DC offset voltage includes a first offset voltage which depends on the gain, and a second offset voltage which does not depend on the gain,
wherein the step of correcting the potential difference includes:
controlling the gain in such a manner that the first offset voltage becomes sufficiently larger than the second offset voltage; and
setting a potential difference correction amount for attenuating the second offset voltage of the DC offset voltage, and
wherein the outputting the first correction voltage includes:
controlling the gain in such a manner that the first offset voltage becomes sufficiently larger than the second offset voltage in a state in which the second offset voltage is attenuated by the potential difference correcting operation; and
setting the first correction voltage so as to attenuate the first offset voltage of the DC offset voltage.

8. A receiving device comprising a variable gain amplifier according to claim 1 .

9. A variable gain amplifier comprising:
a differential amplifier circuit including an inversion input terminal, a non-inversion input terminal, an inversion output terminal, and a non-inversion output terminal;
first and second feedback resistors respectively coupled between the inversion output terminal and the non-inversion input terminal and between the non-inversion output terminal and the inversion input terminal;
first and second input resistors respectively coupled to the inversion input terminal and the non-inversion input terminal;
a control unit for controlling resistance values of the first and second feedback resistors or resistance values of the first and second input resistors to control a gain;
a first voltage correction unit coupled to a preceding stage of the first and second input resistors and for outputting a first correction voltage to correct a potential difference generated between a first conductor provided with the first input resistor and a second conductor provided with the second input resistor; and
a second voltage correction unit coupled to the inversion output terminal and the non-inversion output terminal and for correcting a potential difference generated between a third conductor coupled to the inversion output terminal and a fourth conductor coupled to the non-inversion output terminal,
wherein the control unit is configured to control the first correction voltage and a correction amount of the potential difference by the second voltage correction unit and thereby attenuate a DC offset voltage generated betwee

Assignees

• Renesas Electronics Corp

Inventors

• Matsuno Noriaki
• Tomisawa Satoru

Classifications

• H03F3/45076

  characterised by the way of implementation of the active amplifying circuit in the differential amplifier · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F2203/45051

  Two or more differential amplifiers cascade coupled · CPC title

• H03F3/45748

  by using a feedback circuit · CPC title

• H03F3/45973

  by using a feedback circuit · CPC title