Voltage converter for simulating inductor current control

US10312806B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10312806-B1
Application numberUS-201816030075-A
CountryUS
Kind codeB1
Filing dateJul 9, 2018
Priority dateFeb 2, 2018
Publication dateJun 4, 2019
Grant dateJun 4, 2019

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides a voltage converter for simulating inductor current control, which simulates an inductor current of a power level circuit according to operation signals generated by a control circuit, an input voltage, and an output voltage, thereby achieving detection of the inductor current by using a non-sensing method. Therefore, compared to a conventional sensing method, the voltage converter of the present disclosure can reduce use of a sensing circuit to reduce costs, and an inductor current ramp generated thereby has no distortion. Accordingly, the voltage converter of the present disclosure can improve the accuracy of inductor current detection.

First claim

Opening claim text (preview).

What is claimed is: 1. A voltage converter for simulating inductor current control, used to convert an input voltage into an output voltage, and the voltage converter comprising: a power level circuit having a high-side switch, a low-side switch, and an inductor, wherein the high-side switch is coupled to the low-side switch and the inductor; a gate driver coupled to the power level circuit, periodically controlling the high-side switch and the low-side switch according to a plurality of operation signals to charge or discharge the inductor, and generating the output voltage according to an inductor current flowing through the inductor; a control circuit coupled between the power level circuit and the gate driver, generating a feedback error signal related to the output voltage, and generating the operation signals according to the feedback error signal and a ramp signal related to the inductor current; and an inductor current ramp generator coupled to the control circuit and the power level circuit; wherein when the gate driver drives the power level circuit to charge the inductor, the inductor current ramp generator increases the ramp signal according to one of the operation signals, the input voltage and the output voltage, to simulate the inductor current; wherein when the gate driver drives the power level circuit to discharge the inductor, the inductor current ramp generator decreases the ramp signal according to one of the operation signals, the input voltage and the output voltage, to simulate the inductor current; wherein an end of the high-side switch receives the input voltage, another end of the high-side switch is connected to ground through the low-side switch, the inductor is coupled between the high-side switch and the low-side switch, and the output voltage lower than the input voltage is generated by the inductor current, wherein the inductor current ramp generator includes: a discharging switch connected in series with a discharging current source, wherein a discharging current of the discharging current source is related to the output voltage with a first rate; a charging switch connected in series with a charging current source, wherein a charging current of the charging current source is related to the input voltage with a second rate; and a capacitor connected in parallel to the discharging current source and the charging current source; wherein when the gate driver drives the power level circuit to charge the inductor, the discharging switch maintains conduction according to a high-level, the charging switch conducts according to one of the operation signals, the charging current source charges the capacitor and the discharging current source discharges the capacitor to generate the ramp signal; wherein when the gate driver drives the power level circuit to discharge the inductor, the discharging switch maintains conduction according to the high-level, the charging switch cuts off according to one of the operation signals, and the discharging current source discharges the capacitor to generate the ramp signal. 2. The voltage converter for simulating inductor current control according to claim 1 , wherein when the first rate and the second rate match a rate value and a reciprocal of the rate value and a capacitance value of the capacitor match the inductor current, the ramp signal is equal to the inductor current. 3. The voltage converter for simulating inductor current control according to claim 1 , wherein when the output voltage generated by the inductor current is higher than the input voltage and the gate driver drives the power level circuit to charge the inductor, the discharging switch maintains conduction according to a high-level, the discharging switch cuts off according to one of the operation signals, and the charging current source charges the capacitor to generate the ramp signal; when the output voltage generated by the inductor current is higher than the input voltage and the gate driver drives the power level circuit to discharge the inductor, the discharging switch maintains conduction according to the high-level, the discharging switch conducts according to one of the operation signals, the discharging current source discharges the capacitor, and the charging current source charges the capacitor to generate the ramp signal. 4. The voltage converter for simulating inductor current control according to claim 3 , wherein when the first rate and the second rate match a rate value and a reciprocal of the rate value and a capacitance value of the capacitor match the inductor current, the ramp signal is equal to the inductor current. 5. A voltage converter for simulating inductor current control, used to convert an input voltage into an output voltage, and the voltage converter comprising: a power level circuit having a first switch, a second switch, a third switch, a fourth switch, and an inductor, wherein an end of the inductor is coupled between the first switch and the second switch and another end of the inductor is coupled between the third switch and the fourth switch; a gate driver coupled to the power level circuit, periodically controlling the first switch, the second switch, the third switch, and fourth switch according to a plurality of operation signals to charge or discharge the inductor in a buck mode or in a boost mode, and generating the output voltage according to an inductor current flowing through the inductor; a control circuit coupled between the power level circuit and the gate driver, generating a feedback error signal related to the output voltage, and generating the operation signals according to the feedback error signal and a ramp signal related to the inductor current; and an inductor current ramp generator coupled to the control circuit and the power level circuit; wherein when the gate driver drives the power level circuit in the buck mode to charge the inductor, the inductor current ramp generator increases the ramp signal according to one of the operation signals controlling the first switch, the second switch, the input voltage and the output voltage, to simulate the inductor current; wherein when the gate driver drives the power level circuit in the buck mode to discharge the inductor, the inductor current ramp generator decreases the ramp signal according to one of the operation signals controlling the first switch, the second switch, the input voltage and the output voltage, to simulate the inductor current; wherein when the gate driver drives the power level circuit in the boost mode to discharge the inductor, the inductor current ramp generator decreases the ramp signal according to one of the operation signals controlling the third switch, the fourth switch, the input voltage and the output voltage, to simulate the inductor current; wherein when the gate driver drives the power level circuit in the boost mode to charge the inductor, the inductor current ramp generator increases the ramp signal according to one of the operation signals controlling the third switch, the fourth switch, the input voltage and the output voltage, to simulate the inductor current; wherein an end of the first switch receives the input voltage, another end of the first switch connects to ground through the second switch, an end of the fourth switch connects to ground through the third switch, and the inductor generates the output voltage through another end of the fourth switch, wherein the inductor current ramp generator includes: a discharging switch connected in series with a discharging current source, wherein a discharging current of the discharging current source is related to the output voltage with a first rate; a charging switch connected in series with a charging current source, wherein a charging current of the charging current source is relat

Assignees

Inventors

Classifications

  • H02M3/156Primary

    with automatic control of output voltage or current, e.g. switching regulators · CPC title

  • Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • including plural semiconductor devices as final control devices for a single load · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US10312806B1 cover?
The present disclosure provides a voltage converter for simulating inductor current control, which simulates an inductor current of a power level circuit according to operation signals generated by a control circuit, an input voltage, and an output voltage, thereby achieving detection of the inductor current by using a non-sensing method. Therefore, compared to a conventional sensing method, th…
Who is the assignee on this patent?
Anpec Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H02M3/156. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 04 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).