Method of manufacturing piezoelectric element and piezoelectric substrate

Patent metadata

Field	Value
Publication number	US-10312430-B2
Application number	US-201615059318-A
Country	US
Kind code	B2
Filing date	Mar 3, 2016
Priority date	Nov 9, 2015
Publication date	Jun 4, 2019
Grant date	Jun 4, 2019

Abstract

A method of manufacturing a piezoelectric element includes: forming a patterned mask layer over a substrate, in which the patterned mask layer has an opening exposing a portion of the substrate; forming a piezoelectric element in the opening; and removing the patterned mask layer to obtain the piezoelectric element, in which the piezoelectric element has a central portion and a peripheral portion adjacent to the central portion, and the peripheral portion has a maximum height greater than a height of the central portion.

First claim

What is claimed is:

1. A method of manufacturing a piezoelectric element, comprising:
providing a substrate;
forming a patterned mask layer through a cut or punch process, wherein the patterned mask layer has an opening;
adhering the patterned mask layer to the substrate, wherein the opening exposes a portion of the substrate;
forming a piezoelectric element on the portion of the substrate; and
removing the patterned mask layer to obtain the piezoelectric element, wherein the piezoelectric element has a central portion and a peripheral portion adjacent to the central portion, and the peripheral portion has a maximum height greater than a height of the central portion, and an included angle between a sidewall of the peripheral portion and a surface of the substrate is in a range of 40° to 100°.

2. The method of claim 1 , wherein forming the piezoelectric element on the portion of the substrate comprises:
filling a piezoelectric material solution in the opening; and
solidifying the piezoelectric material solution to form the piezoelectric element.

3. The method of claim 2 , wherein the piezoelectric material solution has a height less than a depth of the opening.

4. The method of claim 1 , wherein the patterned mask layer comprises a plastic material layer and an adhesive layer between the plastic material layer and the substrate.

5. The method of claim 1 , wherein the patterned mask layer comprises polyethylene terephthalate, polyimide, polycarbonate (PC), polyethylene (PE), polymethyl methacrylate (PMMA), metal, alloy, or silicon.

Assignees

• Interface Optoelectronics Shenzhen Co Ltd
• General Interface Solution Ltd

Inventors

• Hsu Chen-Chu
• Tsai Ying-Hung
• Chuang Wei-Chung
• Mondal Somnath

Classifications

• H10W90/00

  Package configurations · CPC title

• H01L41/053

  Electricity · mapped topic

• H01L41/193

  Electricity · mapped topic

• H05K3/1225

  Screens or stencils; Holders therefor · CPC title

• Y10T29/42

  Piezoelectric device making · CPC title