Display substrate and manufacturing method thereof, and display device

Patent metadata

Field	Value
Publication number	US-10312266-B2
Application number	US-201715807632-A
Country	US
Kind code	B2
Filing date	Nov 9, 2017
Priority date	Jan 13, 2017
Publication date	Jun 4, 2019
Grant date	Jun 4, 2019

Abstract

The disclosure discloses a display substrate and a manufacturing method thereof, and a display device, the display substrate comprises a display region and a periphery region, a first electrode line is arranged at the periphery region, an insulating layer is arranged on the first electrode line, a first through hole is provided in the insulating layer at a position corresponding to the first electrode line, a contact electrode is provided in the first through hole, a second electrode line is arranged on the insulating layer, the second electrode line is electrically connected to the first electrode line through the contact electrode. In the disclosure, the contact electrode is provided between the first and second electrode lines, thus when the second electrode line is etched, the first electrode line is protected by the contact electrode from being damaged by etchant, thus saving production cost and improving production efficiency.

First claim

What is claimed is:

1. A display substrate, comprising a display region and a periphery region,
wherein the display substrate further comprises:
a first electrode line arranged at the periphery region;
an insulating layer arranged on the first electrode line;
a first through hole provided in the insulating layer at a position corresponding to the first electrode line;
a contact electrode provided in the first through hole; and
a second electrode line arranged on the insulating layer, and
wherein the second electrode line is electrically connected to the first electrode line by the contact electrode; and
wherein the first electrode line and a gate at the display region are arranged in a same layer, the contact electrode and a pixel electrode at the display region are arranged in a same layer, and the second electrode line and a source and a drain at the display region are arranged in a same layer.

2. The display substrate of claim 1 , further comprising a base substrate, wherein an orthographic projection of the contact electrode on the base substrate covers at least an orthographic projection of a bottom of the first through hole on the base substrate.

3. The display substrate of claim 2 , wherein a length of the orthographic projection of the contact electrode on the base substrate is larger than a length of the orthographic projection of the bottom of the first through hole on the base substrate.

4. The display substrate of claim 3 , wherein the first electrode line and a gate at the display region are arranged in a same layer, the contact electrode and a pixel electrode at the display region are arranged in a same layer, and the second electrode line and a source and a drain at the display region are arranged in a same layer.

5. The display substrate of claim 3 , further comprising a passivation layer arranged on the second electrode line, wherein a second through hole is provided in the passivation layer, a common electrode is arranged on the passivation layer, and the common electrode is electrically connected to the second electrode line by the second through hole.

6. The display substrate of claim 2 , wherein the first electrode line and a gate at the display region are arranged in a same layer, the contact electrode and a pixel electrode at the display region are arranged in a same layer, and the second electrode line and a source and a drain at the display region are arranged in a same layer.

7. The display substrate of claim 2 , further comprising a passivation layer arranged on the second electrode line, wherein a second through hole is provided in the passivation layer, a common electrode is arranged on the passivation layer, and the common electrode is electrically connected to the second electrode line by the second through hole.

8. The display substrate of claim 1 , wherein a material of the contact electrode includes a metal oxide.

9. The display substrate of claim 8 , wherein the metal oxide comprises indium tin oxide.

10. The display substrate of claim 9 , further comprising a passivation layer arranged on the second electrode line, wherein a second through hole is provided in the passivation layer, a common electrode is arranged on the passivation layer, and the common electrode is electrically connected to the second electrode line by the second through hole.

11. The display substrate of claim 8 , further comprising a passivation layer arranged on the second electrode line, wherein a second through hole is provided in the passivation layer, a common electrode is arranged on the passivation layer, and the common electrode is electrically connected to the second electrode line by the second through hole.

12. The display substrate of claim 1 , further comprising a passivation layer arranged on the second electrode line, wherein a second through hole is provided in the passivation layer, a common electrode is arranged on the passivation layer, and the common electrode is electrically connected to the second electrode line by the second through hole.

13. A display device, comprising the display substrate of claim 1 .

14. A manufacturing method of a display substrate, comprising:
depositing a first metal layer on a base substrate;
forming a gate at a display region and forming a first electrode line at a periphery region, by a single patterning process;
depositing an insulating layer;
forming a first through hole in the insulating layer at the periphery region at a position corresponding to the first electrode line by a patterning process;
depositing a conductive material layer;
forming a pixel electrode at the display region and forming a contact electrode in the first through hole at the periphery region, by a single patterning process;
depositing a second metal layer; and
forming a source and a drain at the display region and forming a second electrode line on the insulating layer at the periphery region, by a single patterning process, such that the second electrode line is electrically connected to the first electrode line through the contact electrode.

15. The manufacturing method of claim 14 , wherein a material of the contact electrode includes a metal oxide.

16. The manufacturing method of claim 14 , prior to forming a first through hole in the insulating layer at the periphery region at a position corresponding to the first electrode line by a patterning process, further comprising:
forming a semiconductor layer at the display region by a patterning process.

17. The manufacturing method of claim 14 , further comprising:
forming a passivation layer on the second electrode line such that a second through hole is provided in the insulating layer; and
forming a common electrode on the passivation layer such that the common electrode is electrically connected to the second electrode line by the second through hole.

18. The manufacturing method of claim 14 , wherein an orthographic projection of the contact electrode on the base substrate covers at least an orthographic projection of a bottom of the first through hole on the base substrate.

Assignees

• Boe Technology Group Co Ltd
• Hefei Boe Optoelectronics Tech

Inventors

• Zhang Jun
• Shi Gaofei
• Zhou Ru
• Zhan Jianying

Classifications

• H10P50/71

  using masks for conductive or resistive materials · CPC title

• G02F1/136227

  Through-hole connection of the pixel electrode to the active element through an insulation layer · CPC title

• G02F1/136286

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/1362

  Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title