Oscillator device
US-9444475-B2 · Sep 13, 2016 · US
US10298175B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10298175-B2 |
| Application number | US-201615385455-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 20, 2016 |
| Priority date | Jan 6, 2016 |
| Publication date | May 21, 2019 |
| Grant date | May 21, 2019 |
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A circuit device includes an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency using a resonator, the oscillation frequency being a frequency set by using frequency control data, and a processor configured to perform a signal process on input frequency control data based on a phase comparison result between an input signal based on the oscillation signal and a reference signal. The processor is configured to estimate a true value for an observed value of the frequency control data based on the phase comparison result through a Kalman filter process in a period before a hold-over state is detected, and generate aging-corrected frequency control data, in a case where the hold-over state is detected, by holding the true value at a timing corresponding to a timing of detecting the hold-over state, and by performing a calculation based on the true value.
Opening claim text (preview).
What is claimed is: 1. A circuit device comprising: an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency using a resonator, the oscillation frequency being a frequency set by using frequency control data; and a processor configured to; perform a signal process on input frequency control data based on a phase comparison result between an input signal based on the oscillation signal and a reference signal; estimate a true value for an observed value of the frequency control data based on the phase comparison result through a Kalman filter process in a period before a hold-over state due to the absence or abnormality of the reference signal is detected; and generate aging-corrected frequency control data, in a case where the hold-over state is detected, by holding the true value at a timing corresponding to a timing of detecting the hold-over state, and by performing a calculation based on the true value, the calculation including addition of a correction based on an aging rate that indicates a change rate of oscillation frequency with respect to lapsed time, wherein the aging rate is calculated based on an aging gradient sequentially added to the true value up to the timing of the hold-over state being detected. 2. The circuit device according to claim 1 , wherein the processor is configured to generate the aging-corrected frequency control data by performing the calculation of adding a correction value to the true value. 3. The circuit device according to claim 2 , wherein the processor is configured to obtain the aging-corrected frequency control data AC(k+1) at a time step k+1 according to AC(k+1)=AC(k)+D(k), where D(k) is the correction value at a time step k, and AC(k) is the aging-corrected frequency control data at the time step k. 4. The circuit device according to claim 2 , wherein the processor is configured to perform the calculation of adding the correction value after a filter process to the true value. 5. The circuit device according to claim 2 , wherein the processor is configured to obtain the correction value on the basis of an observation residual in the Kalman filter process. 6. The circuit device according to claim 1 , further comprising: a storage that stores a system noise constant for setting system noise in the Kalman filter process and an observation noise constant for setting observation noise in the Kalman filter process. 7. The circuit device according to claim 1 , wherein the processor is configured to determine whether or not the hold-over state has occurred, on the basis of a voltage of an input terminal to which a hold-over detection signal is input or hold-over detection information which is input via a digital interface. 8. The circuit device according to claim 1 , wherein, in a case where the oscillation signal generation circuit is recovered from the hold-over state, the oscillation signal generation circuit generates the oscillation signal on the basis of the frequency control data based on the phase comparison result. 9. An oscillator comprising: the circuit device according to claim 1 ; and the resonator. 10. An electronic apparatus comprising the circuit device according to claim 1 . 11. A vehicle comprising the circuit device according to claim 6 .
Stabilisation of generator output against variations of physical values, e.g. power supply · CPC title
a numerical count result being used for locking the loop, the counter counting during fixed time intervals {(H03L7/1806 takes precedence)} · CPC title
the amplifier being a single transistor (H03B5/364 - H03B5/368 take precedence) · CPC title
the means being voltage variable capacitance diodes · CPC title
using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title
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