Eutectic electrode structure of flip-chip LED chip and flip-chip LED chip

Patent metadata

Field	Value
Publication number	US-10297736-B2
Application number	US-201715853845-A
Country	US
Kind code	B2
Filing date	Dec 24, 2017
Priority date	Oct 13, 2015
Publication date	May 21, 2019
Grant date	May 21, 2019

Abstract

A Flip-chip LED chip includes: a substrate; a first semiconductor layer; a second semiconductor layer; a local defect region over part of the second semiconductor layer, which extends downward to the first semiconductor layer; a first metal layer over part of the first semiconductor layer; a second metal layer over part of the second semiconductor layer; an insulating layer covering the first metal layer, the second metal layer, the second semiconductor layer and the first semiconductor layer in the local defect region, with opening structures over the first metal layer and the second metal layer respectively; an eutectic electrode structure over the insulating layer, including a first eutectic layer and a second eutectic layer at vertical direction, and a first-type electrode region and a second-type electrode region at horizontal direction. Poor packaging caused by high eutectic void content during eutectic bonding process can therefore be reduced.

First claim

The invention claimed is:

1. A eutectic electrode structure of a flip-chip LED chip, comprising a first eutectic layer and a second eutectic layer from bottom to up in a vertical direction, and having a first-type electrode region and a second-type electrode region in a horizontal direction, wherein an upper surface and a lower surface of the first eutectic layer are not flat, and an upper surface and a lower surface of the second eutectic layer are both flat, and wherein the upper surface of the second eutectic layer is higher than or is of equal height with the upper surface of the first eutectic layer to thereby form a flat eutectic plane.

2. The eutectic electrode structure of flip-chip LED chip of claim 1 , wherein the lower surface of the first eutectic layer contact with the flip-chip LED chip for current conduction.

3. A flip-chip LED chip, comprising:
a substrate;
a first semiconductor layer over the substrate;
a light emitting layer over the first semiconductor layer;
a second semiconductor layer over the light emitting layer;
a local defect region over part of the second semiconductor layer, which extends downward to the first semiconductor layer;
a first metal layer over part of the first semiconductor layer;
a second metal layer over part of the second semiconductor layer;
an insulating layer covering the first metal layer, the second metal layer, the second semiconductor layer and the first semiconductor layer in the local defect region, wherein, the insulating layer has opening structures over the first metal layer and the second metal layer respectively;
an eutectic electrode structure over the insulating layer with openings, wherein the eutectic electrode structure comprises a first eutectic layer and a second eutectic layer from bottom to up at vertical direction, and is divided into a first-type electrode region and a second-type electrode region at horizontal direction;
wherein an upper surface and a lower surface of the first eutectic layer are not flat, and an upper surface and a lower surface of the second eutectic layer are both flat;
and wherein the upper surface of the second eutectic layer is higher than or is of equal height with the upper surface of the first eutectic layer to thereby form a flat eutectic plane.

4. The flip-chip LED chip of claim 3 , wherein, the second eutectic layer in the first-type electrode region is of same height with the second eutectic layer in the second-type electrode region.

5. The flip-chip LED chip of claim 3 , wherein, the lower surface of the first eutectic layer contacts with the first metal layer and the second metal layer respectively for current conduction.

6. The flip-chip LED chip of claim 3 , wherein, the second eutectic layer do not overlap with the first metal layer and the second metal layer at vertical direction.

7. The flip-chip LED chip of claim 3 , wherein: a transparent conducting layer is formed over the second semiconductor layer.

8. The flip-chip LED chip of claim 3 , wherein, the first metal layer and the second metal layer are composed of metal bodies and metal spreading fingers, or the first metal layer and the second metal layer are metal bodies.

9. The flip-chip LED chip of claim 8 , wherein: the opening structure of the insulating layer is only over the metal body.

10. A light-emitting system comprising a plurality of flip-chip LED chips each including:
a substrate;
a first semiconductor layer over the substrate;
a light emitting layer over the first semiconductor layer;
a second semiconductor layer over the light emitting layer;
a local defect region over part of the second semiconductor layer, which extends downward to the first semiconductor layer;

a first metal layer over part of the first semiconductor layer;
a second metal layer over part of the second semiconductor layer;
an insulating layer covering the first metal layer, the second metal layer, the second semiconductor layer and the first semiconductor layer in the local defect region, wherein, the insulating layer has opening structures over the first metal layer and the second metal layer respectively;
an eutectic electrode structure over the insulating layer with openings, wherein, the eutectic electrode structure is composed of first eutectic layers and second eutectic layers from bottom to up at vertical direction, and is divided into a first-type electrode region and a second-type electrode region at horizontal direction;
wherein upper surfaces and lower surfaces of the first eutectic layers are not flat, and upper surfaces and lower surfaces of the second eutectic layers are both flat; and

wherein the upper surface of the second eutectic layer is higher than or is of equal height with the upper surface of the first eutectic layer to thereby form a flat eutectic plane.

11. The light-emitting system of claim 10 , wherein the lower surfaces of the first eutectic layers contact with the first metal layer and the second metal layer respectively for current conduction.

12. The light-emitting system of claim 10 , wherein the second eutectic layer in the first-type electrode region is of same height with the second eutectic layer in the second-type electrode region.

13. The light-emitting system of claim 10 , wherein the second eutectic layers do not overlap with the first metal layer and the second metal layer at vertical direction.

14. The light-emitting system of claim 10 , wherein the first metal layer and the second metal layer are composed of metal bodies and metal spreading fingers, or the first metal layer and the second metal layer are metal bodies.

15. The light-emitting system of claim 14 , wherein the opening structure of the insulating layer is only over the metal body.

16. The light-emitting system of claim 10 , wherein a transparent conducting layer is formed over the second semiconductor layer.

Assignees

• Xiamen Sanan Optoelectronics Technology Co Ltd

Inventors

• He Anhe
• Lin Suhui
• Zheng Jiansen
• Peng Kangwei
• Lin Xiaoxiong
• Hsu Chenke

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W72/07555

  changes in materials · CPC title

• H10W72/07236

  Soldering or alloying · CPC title

• H10W72/5527

  Eutectic alloys · CPC title