Method of forming a wrap-around contact on a semiconductor device

Patent metadata

Field	Value
Publication number	US-10297499-B2
Application number	US-201715642569-A
Country	US
Kind code	B2
Filing date	Jul 6, 2017
Priority date	Dec 19, 2013
Publication date	May 21, 2019
Grant date	May 21, 2019

Abstract

Techniques and methods related to forming a wrap-around contact on a semiconductor device, and apparatus, system, and mobile platform incorporating such semiconductor devices.

First claim

What is claimed:

1. A semiconductor device comprising:
a substrate;
at least two semiconductor bodies separated from each other by a trench and disposed over the substrate, the semiconductor bodies having a source region and a drain region separated by a channel region;
a resputter-formed contact layer on the semiconductor bodies and formed by re-sputtering an initial contact layer at least partially redistributed to a portion of the semiconductor bodies within the trench so that the resputter-formed contact layer has at least a partial overhang with respect to one or more sidewalls of the semiconductor bodies;
a gate dielectric layer disposed over the channel region of the semiconductor bodies; and
a gate electrode disposed over the gate dielectric layer.

2. The semiconductor device of claim 1 wherein the semiconductor bodies have a top and sidewalls extending from, and transverse to, the top, and wherein the initial contact layer is disposed at least on the top, and the resputter-formed contact layer is disposed at the sidewalls with contact material from initial contact layer at the top.

3. The semiconductor device of claim 1 wherein the semiconductor bodies have sidewalls extending from the trench, the trench having a bottom, and wherein the initial contact layer is disposed at the bottom of the trench, and wherein the resputter-formed contact layer at the sidewalls is at least partially formed from contact material from the bottom of the trench.

4. The semiconductor device of claim 1 wherein the initial contact layer comprises a sacrificial portion configured and arranged to be redistributed during re-sputtering of the contact material from the initial contact layer.

5. The semiconductor device of claim 4 wherein the sacrificial portion adds about 10-20 nm to the height of the initial contact layer.

6. The semiconductor device of claim 1 wherein the contact material comprises titanium.

7. The semiconductor device of claim 1 wherein the semiconductor bodies have a top and sidewalls extending transverse to a top, and wherein the resputter-formed contact layer is disposed at the sidewalls and has a total thickness at the sidewalls of at least about 1-5 nm thick.

8. The semiconductor device of claim 1 wherein the semiconductor bodies have a top and sidewalls extending from, and transverse to, the top, and wherein the initial contact layer is disposed at least on the top, and the resputter-formed contact layer is disposed at the sidewalls with contact material from the initial contact layer at the top,
wherein the semiconductor bodies have sidewalls extending from the trench, the trench having a bottom, and wherein the initial contact layer is disposed at the bottom of the trench, and wherein the resputter-formed contact layer at the sidewalls is at least partially formed from contact material from the bottom of the trench,
wherein the initial contact layer comprises a sacrificial portion configured and arranged to be redistributed during re-sputtering of the contact material from the initial contact layer,
wherein the sacrificial portion adds about 10-20 nm to the height of the initial contact layer,
wherein the resputter-formed contact layer is disposed at the sidewalls and has a thickness at the sidewalls of at least about 1-5 nm thick,
wherein the contact material comprises titanium,
wherein the re-sputter-formed contact layer being formed by a plasma bombardment material directed toward the initial contact layer and on a biased wafer; and
the semiconductor device comprising a spacer disposed at the gate electrode, the contact material being disposed at a surface of the spacer from the depositing of the contact material of the initial contact layer, and the contact material having a sufficient amount on the surface of the spacer to form a sacrificial layer at the spacer to avoid damage to the spacer during re-sputtering.

9. A mobile computing platform, comprising:
a microprocessor comprising:
a substrate,
at least two semiconductor bodies separated from each other by a trench and disposed over the substrate, the semiconductor bodies having a source region and a drain region separated by a channel region,
a resputter-formed contact layer on the semiconductor bodies and formed by re-sputtering an initial contact layer at least partially redistributed to a portion of the semiconductor bodies within the trench so that the resputter-formed contact layer has at least a partial overhang with respect to one or more sidewalls of the semiconductor bodies;
a gate dielectric layer disposed over the channel region of the semiconductor bodies, and
a gate electrode disposed over the gate dielectric layer;

a display screen communicatively coupled to the microprocessor; and
a wireless transceiver communicatively coupled to the microprocessor.

10. The platform of claim 9 wherein the semiconductor bodies have a top and sidewalls extending from, and transverse to, the top, and wherein the initial contact layer is disposed at least on the top, and the resputter-formed contact layer is disposed at the sidewalls with contact material from the initial contact layer at the top.

11. The platform of claim 9 wherein the semiconductor bodies have sidewalls extending from the trench, the trench having a bottom, and wherein the initial contact layer is disposed at the bottom of the trench, and wherein the resputter-formed contact layer at the sidewalls is at least partially formed from contact material from the bottom of the trench.

12. The platform of claim 9 wherein the initial contact layer comprises a sacrificial portion configured and arranged to be redistributed during re-sputtering of the contact material from the initial contact layer.

13. The platform of claim 12 wherein the sacrificial portion adds about 10-20 nm to the height of the initial contact layer.

14. The platform of claim 9 wherein the semiconductor bodies have a top and sidewalls extending transverse to a top, and wherein the resputter-formed contact layer is disposed at the sidewalls and has a thickness at the sidewalls of at least about 1-5 nm thick.

15. The platform of claim 9 , wherein the semiconductor bodies have a top and sidewalls extending from, and transverse to, the top, and wherein the initial contact layer is disposed at least on the top, and the resputter-formed contact layer is disposed at the sidewalls with contact material from the initial contact layer at the top,
wherein the semiconductor bodies have sidewalls extending from the trench, the trench having a bottom, and wherein the initial contact layer is disposed at the bottom of the trench, and wherein the resputter-formed contact layer at the sidewalls is at least partially formed from contact material from the bottom of the trench,
wherein the initial contact layer comprises a sacrificial portion configured and arranged to be redistributed during re-sputtering of the contact material from the initial contact layer,
wherein the sacrificial portion adds about 10-20 nm to the height of the initial contact layer,
wherein the resputter-formed contact layer is disposed at the sidewalls and has a thickness at the sidewalls of at least about 1-5 nm thick,
wherein the contact material comprises titanium,
wherein the re-sputter-formed contact layer being formed by a plasma bombardment material directed toward the initial contact layer and on a biased wafer; and
the platform comprising a spacer disposed at the gate electrode, the contact material being disposed at a surface of the spacer from the depositing of the contact material of the initial contact layer, and the contac

Assignees

• Intel Corp

Inventors

• Leib Jeffrey S
• Troeger Ralph T
• Bergstrom Daniel

Classifications

• H10P14/418

  the conductive layers comprising transition metals · CPC title

• H10P14/44 Primary

  Physical vapour deposition [PVD] · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title

• H10W20/054

  by selectively removing parts thereof (H10W20/034 takes precedence) · CPC title