Measurements associated with a main radio and a low-power wake up receiver
US-2024340666-A1 · Oct 10, 2024 · US
US10292099B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10292099-B2 |
| Application number | US-201414403929-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 6, 2014 |
| Priority date | Mar 11, 2013 |
| Publication date | May 14, 2019 |
| Grant date | May 14, 2019 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Provided is a transmission apparatus capable of reducing power consumption of a reception apparatus. The transmission apparatus includes a modulator that modulates a data signal to generate a transmission signal. The modulator modulates the data signal by assigning the data signal to a frequency difference between a first frequency and a second frequency in a carrier.
Opening claim text (preview).
The invention claimed is: 1. A transmission apparatus comprising: modulation circuitry, which in operation, modulates each of data bits by assigning a plurality of data bits to one of: a pair of a frequency of f1−df and a frequency of f2+df, and a pair of a frequency of f1+df and a frequency of f2−df to generate a transmission data sequence; and transmission circuitry, which in operation, transmits the transmission data sequence, wherein each of the data bits is assigned by a reception apparatus to either +2df or −2df with a frequency of f2−f1 as a center frequency. 2. The transmission apparatus according to claim 1 , wherein the modulation circuitry includes: first modulation signal generation circuitry, which in operation, generates a first modulation signal by frequency-modulating each of the data bits by using the frequency of f1−df or the frequency of f1+df; second modulation signal generation circuitry, which in operation, generates a second modulation signal by frequency-modulating each of inverted data bits, which inverts each of the data bits, by using the frequency of f2+df or the frequency of f2−df; and transmission data sequence generation circuitry, which in operation, generates the transmission data sequence according to the first modulation signal and the second modulation signal. 3. The transmission apparatus according to claim 2 , wherein the modulation circuitry outputs either an I (in-phase) signal or a Q (quadrature) signal of the first modulation signal as a positive frequency component, and outputs either an I signal or a Q signal of the second modulation signal as a negative frequency component. 4. The transmission apparatus according to claim 2 , wherein the modulation circuitry generates the first modulation signal by using a first subcarrier located at the frequency f1, and generates the second modulation signal by using a second subcarrier located at the frequency f2. 5. A reception apparatus comprising: reception circuitry, which in operation, receives a data sequence in which each data bits is assigned to one of: a pair of a frequency of f1−df and a frequency of f2+df, and a pair of a frequency of f1+df and a frequency of f2−df; and demodulation circuitry, which in operation, demodulates the received data sequence to acquire the data bits, wherein the demodulation circuitry includes: intermodulation component deriving circuitry, which in operation, derives an intermodulation component of a square signal obtained by squaring the received data sequence; and intermodulation component demodulation circuitry, which in operation, demodulates the intermodulation component of the square signal which assigns each of the data bits in either +2df or −2df with the frequency of f2−f1 as the center frequency. 6. The reception apparatus according to claim 5 , wherein the intermodulation component deriving circuitry includes a square calculating circuitry, which in operation, squares the reception signal. 7. The reception apparatus according to claim 5 , comprising: local oscillation circuitry, which in operation, generates a local oscillation signal; frequency conversion circuitry, which in operation, frequency-converts the reception signal to a signal in a determined frequency band, based on the reception signal and the local oscillation signal; and amplification circuitry, which in operation, amplifies the signal in the determined frequency band, which is frequency-converted by the frequency conversion circuitry, wherein the intermodulation component deriving circuitry derives an intermodulation component of the square signal obtained by squaring the signal in the determined frequency band amplified by the amplification circuitry. 8. A communication system comprising: a transmission apparatus, which in operation, transmits a transmission data sequence; and a reception apparatus, which in operation, receives the transmission data sequence from the transmission apparatus, wherein the transmission apparatus comprises: modulation circuitry, which in operation, modulates each of data bits by assigning a plurality of data bits to one of: a pair of frequency of f1−df and a frequency of f2+df, and a pair of a frequency of f1+df and a frequency of f2−df to generate the transmission signal; and transmission circuitry, which in operation, transmits the transmission data sequence, wherein each of the data bits is assigned by the reception apparatus to either +2df or −2df with a frequency of f2−f1 as a center frequency, and wherein the reception apparatus comprises: reception circuitry, which in operation, receives the transmission data sequence in which each of the data bits is assigned to the one of: the pair of the frequency of f1−df and the frequency of f2+df, and the pair of the frequency of f1+df and the frequency of f2−df; and demodulation circuitry, which in operation, demodulates the received data sequence to acquire the data bits, wherein the demodulation circuitry includes: intermodulation component deriving circuitry, which in operation, derives an intermodulation component of a square signal obtained by squaring the received data sequence; and intermodulation component demodulation circuitry, which in operation, demodulates the intermodulation component of the square signal which assigns each of the data bits in either +2df or −2df with the frequency f2−f1 as the center frequency. 9. A transmission method comprising: modulating, by a modulation circuitry, each of data bits by assigning a plurality of data bits to one of: a pair of a frequency of f1−df and a frequency of f2+df, and a pair of a frequency of f1+df and a frequency of f2−df to generate a transmission data sequence; and transmitting, by a transmission circuitry, the transmission data sequence; wherein each of the data bits is assigned by a reception apparatus to either +2df or −2df with a frequency of f2−f1 as center frequency. 10. A reception method comprising: receiving, by a reception circuitry, a data sequence in which each of data bits is assigned to one of: a pair of a frequency of f1−df and a frequency of f2+df, and a pair of a frequency of f1+df and a frequency of f2−df; demodulating, by a demodulation circuitry, the received data sequence to acquire the data bits; deriving, by an intermodulation component deriving circuitry included in the demodulation circuitry, an intermodulation component of a square signal obtained by squaring the received data sequence; and demodulating, by an intermodulation component demodulation circuitry included in the demodulation circuitry, the intermodulation component of the square signal which assigns each of the data bits in either +2df or −2df with a frequency of f2−f1 as a center frequency.
Cross-Sectional Technologies · mapped topic
Modulator circuits; Transmitter circuits · CPC title
Details {; arrangements for supplying electrical power along data transmission lines (systems for transmitting signals via power distribution lines H04B3/54)} · CPC title
Resources in frequency domain, e.g. a carrier in FDMA · CPC title
Cross-Sectional Technologies · mapped topic
Related publications grouped by family.
Answers are generated from the same data shown on this page.