Method and apparatus for improving frame rate in infrared sensor systems

US10291865B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10291865-B2
Application numberUS-201615342192-A
CountryUS
Kind codeB2
Filing dateNov 3, 2016
Priority dateNov 3, 2016
Publication dateMay 14, 2019
Grant dateMay 14, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A scanning sensor system disclosed. The scanning sensor system induces a sensing element array and multiple analog-to-digital converters (ADCs). The sensing element array includes a group of pixels organized in a row and column configuration. During each read cycle, each pixel in an odd column of a row x is selectively connected to a corresponding one of the ADCs that is associated with the odd column pixels, while each pixel in an even column of a row x+(N/2)+1 is selectively connected to a corresponding one of ADCs that is associated with the even column pixels, wherein x is an integer and N is the total number of rows in the sensing element array.

First claim

Opening claim text (preview).

What is claimed is: 1. A scanning sensor system comprising: a sensing element array having a plurality of pixels organized in a row and column configuration; a plurality of switches; and a plurality of analog-to-digital converters (ADCs), wherein during one read cycle, each pixel in an odd column of a row x is selectively connected to a corresponding one of said plurality of ADCs in said odd column via one of said switches, while each pixel in an even column of a row x+(N/2)+1 is selectively connected to a corresponding one of said plurality of ADCs in said even column via one of said switches, wherein x is an integer and N is an even integer indicating the total number of rows in said sensing element array. 2. The scanning sensor system of claim 1 , further comprising a plurality of sample-and-hold circuits coupled to said ADCs. 3. The scanning sensor system of claim 2 , further comprising a processor coupled to said ADCs. 4. The scanning sensor system of claim 3 , further comprising a display coupled to said processor. 5. A scanning sensor system comprising: a sensing element array having a plurality of pixels organized in a row and column configuration; a plurality of switches; and a plurality of analog-to-digital converters (ADCs), wherein during one read cycle, each pixel in a column 3x−2 of a row x is selectively connected to a corresponding one of said plurality of ADCs in said column 3x−2 via one of said switches, each pixel in a column 3x−1 of a row x+(N/3)+1 is selectively connected to a corresponding one of said plurality of ADCs in said column 3x−1 via one of said switches, and each pixel in a column 3x of a row x+(2N/3)+1 is selectively connected to a corresponding one of said plurality of ADCs in said column 3 x via one of said switches, wherein x is an integer and N is a divisible-by-3 integer indicating the total number of rows in said sensing element array. 6. The scanning sensor system of claim 5 , further comprising a plurality of sample-and-hold circuits coupled to said ADCs. 7. The scanning sensor system of claim 6 , further comprising a processor coupled to said ADCs. 8. The scanning sensor system of claim 7 , further comprising a display coupled to said processor. 9. A method for improving frame rate in a scanning sensor system, said method comprising: providing a sensing element array having a plurality of pixels organized in a row and column configuration; providing a plurality of analog-to-digital converters (ADCs); during one read cycle, selectively connecting each pixel in an odd column of a row x to a corresponding one of said plurality of ADCs in said odd column, and concurrently selectively connecting each pixel in an even column of a row x+(N/2)+1to a corresponding one of said plurality of ADCs in said even column, wherein x is an integer and N is an even integer indicating the total number of rows in said sensing element array.

Assignees

Inventors

Classifications

  • H04N25/78Primary

    Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

  • by reading contiguous pixels from selected rows or columns of the array, e.g. interlaced scanning · CPC title

  • H04N5/33Primary

    Transforming infrared radiation (cameras or camera modules for generating image signals from infrared radiation H04N23/20; circuitry of SSIS for transforming infrared radiation into image signals H04N25/20) · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US10291865B2 cover?
A scanning sensor system disclosed. The scanning sensor system induces a sensing element array and multiple analog-to-digital converters (ADCs). The sensing element array includes a group of pixels organized in a row and column configuration. During each read cycle, each pixel in an odd column of a row x is selectively connected to a corresponding one of the ADCs that is associated with the odd…
Who is the assignee on this patent?
Bae Sys Inf & Elect Sys Integ
What technology area does this patent fall under?
Primary CPC classification H04N25/78. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 14 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).