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Patent metadata

Field	Value
Publication number	US-10289588-B2
Application number	US-201615199504-A
Country	US
Kind code	B2
Filing date	Jun 30, 2016
Priority date	Jun 30, 2016
Publication date	May 14, 2019
Grant date	May 14, 2019

Abstract

An apparatus having a first interface of a first type supporting a plurality of data ports, a second interface of a second type supporting at least a portion of the plurality data ports, and a third interface of the second type. The apparatus also including a switching module coupled to a control port of the first interface and configured for selectably coupling the plurality of data ports to at least one of the second interface and the third interface based on a signal at the control port.

First claim

What is claimed is:

1. An apparatus, comprising:
a first interface of a first type supporting a plurality of data ports;
a second interface of a second type supporting at least a portion of the plurality data ports,
a third interface of the second type; and
a first switching module and a second switching module coupled to a control port of the first interface and configured for selectably coupling the plurality of data ports to at least one of the second interface and the third interface based on a signal at the control port, the first switching module being connected to the second interface and the second switching module being connected to the third interface,
wherein the signal indicates one of a first routing mode and a second routing mode,
wherein the first routing mode comprises routing signals for the plurality of data ports at the first interface to one of the second interface or third interface, not both the second interface or third interface, and
wherein the second routing mode comprises routing signals to both the second interface and the third interface, by routing a portion of the plurality of data ports to the second interface and routing signals for a remaining portion of the plurality of data ports to the third interface.

2. The apparatus of claim 1 , wherein the plurality of data ports comprises four data ports, and wherein the portion of the plurality of data ports comprises a first two of the plurality of data ports.

3. The apparatus of claim 1 , wherein the first interface comprises a U.2 interface and wherein each of the second interface and he third interface comprises a M.2 interface.

4. The apparatus of claim 1 , wherein each of the second interface and third interface are configured to couple with a component.

5. The apparatus of claim 4 , wherein the component is a PCie SSD.

6. The apparatus of claim 5 , wherein the component is hot-swappable, each second interface and third interface allowing removal from the component during operation.

7. The apparatus of claim 1 , further comprising a hardware monitor capable of detecting device temperature and voltage usage.

8. A method for supporting an apparatus with two interfaces,
a first interface of a first type, and a second interface and a third interface of a second type, the method comprising:
receiving a control signal for selectably coupling a plurality of data ports of a first interface with at least one of a second interface and a third interface, a control port of the first interface coupled to a first switching module and a second switching module, the first switching module being connected to the second interface and the second switching module being connected to the third interface;
in response to receiving the control signal, selecting a first routing mode or a second routing mode;
when in the first routing mode:
routing signals for the plurality of data ports at the first interface to one of the second interface or third interface, not both the second interface or third interface; and
when in the second routing mode:
routing at least a portion of the signals for the plurality of data ports at the first interface to both the second interface and the third interface, by routing a portion of the plurality of data ports to the second interface and routing signals for a remaining portion of the plurality of data ports to the third interface.

9. The method of claim 8 , further comprising monitoring, at the switching module, apparatus operating temperature, voltage, and operating statistics.

10. The method of claim 8 , wherein the plurality of data ports comprises four data ports, and wherein the portion of the plurality of data ports comprises a first two of the plurality of data ports.

11. The method of claim 8 , wherein the first interface comprises a U.2 interface and wherein each of the second interface and the third interface comprises a M.2 interface.

Assignees

• Quanta Comp Inc

Inventors

• Chu Wei-Yi
• Cheng Chia-Feng
• Chang Kai
• Chen Chih-Yu

Classifications

• G06F13/4022 Primary

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/4095

  in incremental bus architectures, e.g. bus stacks · CPC title

• G06F13/4068

  Electrical coupling · CPC title

• G06F13/16

  for access to memory bus (G06F13/28 takes precedence) · CPC title

• G06F3/0688

  Non-volatile semiconductor memory arrays · CPC title