Control device and communication device

Patent metadata

Field	Value
Publication number	US-10284692-B2
Application number	US-201715708146-A
Country	US
Kind code	B2
Filing date	Sep 19, 2017
Priority date	Oct 14, 2016
Publication date	May 7, 2019
Grant date	May 7, 2019

Abstract

A configuration for realizing time synchronization between different protocols is provided. There is provided a control device that constitutes a control system for controlling machines or facilities. The control device includes first communication means configured to transmit and receive data in accordance with a first protocol. The first communication means includes a first timer that defines a time of data transmission and is time-synchronized with an entity to and from which data is transmitted and received. The control device includes second communication means configured to transmit and receive data in accordance with a second protocol different from the first protocol. The second communication means includes a second timer that defines a time of data transmission and is time-synchronized with an entity to and from which data is transmitted and received. The control device includes synchronization means configured to time-synchronize the first timer and the second timer.

First claim

What is claimed is:

1. A control device that constitutes a control system for controlling machines or facilities, the control device comprising:
a first communication circuit configured to transmit and receive data in accordance with a first protocol, the first communication circuit including a first timer that defines a time of data transmission and is time-synchronized with an entity to and from which data is transmitted and received;
a second communication circuit configured to transmit and receive data in accordance with a second protocol different from the first protocol, the second communication circuit including a second timer that defines a time of data transmission and is time-synchronized with an entity to and from which data is transmitted and received; and
a processor configured to time-synchronize the first timer and the second timer, wherein the processor time-corrects the second timer with respect to the first timer, and the processor time-synchronizes each entity time-synchronized with the second communication circuit with the second timer which has been time-corrected.

2. The control device according to claim 1 , wherein the processor is
configured to set the first timer to output a synchronization signal to the second timer every predetermined cycle;
notify the second timer of a first time in the first timer indicating a time at which the synchronization signal is output and which is set in the first timer; and
time-correct the second timer on the basis of a difference between the first time and a second time in the second timer at which the synchronization signal output from the first timer is detected by the second timer.

3. The control device according to claim 1 , further comprising an interface for connection to an external device including a third timer,
wherein the processor time-corrects the first timer and the second timer with respect to the third timer of the external device.

4. The control device according to claim 3 , wherein the external device is connected to the control device via a third communication circuit which is independent from the first communication circuit and the second communication circuit.

5. The control device according to claim 3 , wherein the external device is connected to the control device via an entity that transmits and receives data to and from any one of the first communication circuit and the second communication circuit.

6. The control device according to claim 3 , wherein the processor is
configured to set the third timer to output a synchronization signal to the first timer at a designated third time;
read a fourth time in the first timer which is stored when the synchronization signal output from the third timer is detected by the first timer from the first timer; and
instruct the first timer to correct time on the basis of a difference between the third time and the fourth time.

7. The control device according to claim 6 , wherein the processor is configured to provide setting for a noise filter included in the first timer, and
the first timer compensates for a time delay generated due to the noise filter on the basis of the setting for the noise filter and then stores the fourth time.

8. A communication device comprising:
a first communication circuit configured to transmit and receive data in accordance with a first protocol, the first communication circuit including a first timer that defines a time of data transmission and is time-synchronized with an entity to and from which data is transmitted and received;
a second communication circuit configured to transmit and receive data in accordance with a second protocol different from the first protocol, the second communication circuit including a second timer that defines a time of data transmission and is time-synchronized with an entity to and from which data is transmitted and received; and
a processor configured to time-synchronize the first timer and the second timer, wherein the processor time-corrects the second timer with respect to the first timer, and the processor time-synchronizes each entity time-synchronized with the second communication circuit with the second timer which has been time-corrected.

Assignees

• Omron Tateisi Electronics Co

Inventors

• Ichimura Katsuhiko
• Takai Masaichi
• Nishimura Yasuhiro

Classifications

• G05B19/4185

  characterised by the network communication · CPC title

• H04L7/0008

  Synchronisation information channels, e.g. clock distribution lines · CPC title

• G06F1/14

  Time supervision arrangements, e.g. real time clock · CPC title

• G06F1/12 Primary

  Synchronisation of different clock signals {provided by a plurality of clock generators} · CPC title

• H04L69/28 Primary

  Timers or timing mechanisms used in protocols · CPC title