Channel decoding method, apparatus, and system

Patent metadata

Field	Value
Publication number	US-10284331-B2
Application number	US-201715833560-A
Country	US
Kind code	B2
Filing date	Dec 6, 2017
Priority date	Jun 12, 2015
Publication date	May 7, 2019
Grant date	May 7, 2019

Abstract

Embodiments of the present invention disclose a channel decoding method, apparatus, and system. The channel decoding apparatus includes a memory storing instructions; and a processor coupled to the memory to execute the instructions to: obtain decoding information of first channel decoding of a data block; determine whether the first channel decoding fails; in response to determining that the first channel decoding fails, obtain a reference sequence number of the data block; obtain at least one matching historical demodulated soft value; combine the demodulated soft value of the data block and the at least one matching historical demodulated soft value to obtain a combined demodulated soft value of the data block; and perform second channel decoding on the combined demodulated soft value of the data block.

First claim

What is claimed is:

1. A channel decoding apparatus, comprising:
a memory storing instructions; and
a processor coupled to the memory to execute the instructions to:
obtain decoding information of first channel decoding of a data block, wherein the decoding information of the first channel decoding comprises a decoding result of the first channel decoding of the data block and a demodulated soft value of the data block;
determine whether the first channel decoding fails based on a check on the decoding result of the first channel decoding of the data block;
in response to determining that the first channel decoding fails, obtain a reference sequence number of the data block according to the decoding result of the first channel decoding of the data block;
obtain at least one matching historical demodulated soft value from a historical demodulated soft value record table according to the reference sequence number of the data block, wherein the historical demodulated soft value record table comprises at least one historical demodulated soft value record, and each of the at least one historical demodulated soft value record comprises a historical demodulated soft value and a reference sequence number of a data block corresponding to the historical demodulated soft value;
combine the demodulated soft value of the data block and the at least one matching historical demodulated soft value to obtain a combined demodulated soft value of the data block; and
perform second channel decoding on the combined demodulated soft value of the data block.

2. The apparatus according to claim 1 , wherein the first channel decoding comprises at least one of:
Viterbi algorithm (VA) decoding at physical-layer or high-order decoding at the physical-layer; or
VA decoding at radio link control (RLC)-layer or high-order decoding at the RLC-layer, wherein
the high-order decoding at the physical-layer or the RLC-layer comprises parallel list VA decoding or serial list VA decoding at the respective layer.

3. The channel decoding apparatus according to claim 1 , wherein the processor executes the instructions to:
determine at least one first historical demodulated soft value record in the historical demodulated soft value record table according to the reference sequence number of the data block, wherein a 0 th bit to an M th bit in binary of a reference sequence number of the at least one first historical demodulated soft value record are the same as a 0 th bit to a M th bit in binary of the reference sequence number of the data block, wherein M is a positive integer greater than 0 and less than or equal to N, and N is a binary length of the reference sequence number of the data block; and
obtain, from the at least one first historical demodulated soft value record, a demodulated soft value of the record as the at least one matching historical demodulated soft value.

4. The channel decoding apparatus according to claim 1 , wherein the processor executes the instructions to:
add up the demodulated soft value of the data block and the at least one matching historical demodulated soft value to obtain the combined demodulated soft value of the data block; or
combine the demodulated soft value of the data block and the at least one matching historical demodulated soft value according to a quality threshold, to obtain the combined demodulated soft value of the data block.

5. The channel decoding apparatus according to claim 1 , wherein the second channel decoding comprises at least one of:
Viterbi algorithm (VA) decoding at physical-layer or high-order decoding at the physical-layer; or
VA decoding at radio link control (RLC)-layer or high-order decoding at the RLC-layer, wherein
the high-order decoding at the physical-layer or the RLC-layer comprises parallel list VA decoding or serial list VA decoding at the respective layer.

6. The channel decoding apparatus according to claim 1 , wherein the processor further executes the instructions to:
in response to determining that the second channel decoding fails, add a second historical demodulated soft value record to the historical demodulated soft value record table, wherein a reference sequence number of the second historical demodulated soft value record is the reference sequence number of the data block, and a demodulated soft value of the second historical demodulated soft value record is a demodulated soft value of the data block.

7. The channel decoding apparatus according to claim 1 , wherein the processor further executes the instructions to:
in response to determining that the second channel decoding succeeds, delete the at least one first historical demodulated soft value record from the historical demodulated soft value record table.

8. The channel decoding apparatus according to claim 1 , wherein a service type of the data block is signaling or an R99 packet service.

9. The channel decoding apparatus according to claim 1 , wherein the channel decoding apparatus is deployed on a base station, a controller, or a mobile terminal.

10. A channel decoding method, wherein the method comprises:
obtaining decoding information of first channel decoding of a data block, wherein the decoding information of the first channel decoding comprises a decoding result of the first channel decoding of the data block and a demodulated soft value of the data block;
determining whether the first channel decoding fails based on a check on the decoding result of the first channel decoding of the data block;
in response to determining that the first channel decoding fails, obtaining a reference sequence number of the data block according to the decoding result of the first channel decoding of the data block;
obtaining at least one matching historical demodulated soft value from a historical demodulated soft value record table according to the reference sequence number of the data block, wherein the historical demodulated soft value record table comprises at least one historical demodulated soft value record, and each of the at least one historical demodulated soft value record comprises a historical demodulated soft value and a reference sequence number of a data block corresponding to the historical demodulated soft value;
combining the demodulated soft value of the data block and the at least one matching historical demodulated soft value to obtain a combined demodulated soft value of the data block; and
performing second channel decoding on the combined demodulated soft value of the data block.

11. The method according to claim 10 , wherein the first channel decoding comprises at least one of:
Viterbi algorithm (VA) decoding at physical-layer or high-order decoding at the physical-layer; or
VA decoding at radio link control (RLC)-layer or high-order decoding at the RLC-layer, wherein
the high-order decoding at the physical-layer or the RLC-layer comprises parallel list VA decoding or serial list VA decoding at the respective layer.

12. The method according to claim 10 , wherein the obtaining at least one matching historical demodulated soft value from a historical demodulated soft value record table according to the reference sequence number of the data block comprises:
determining at least one first historical demodulated soft value record in the historical demodulated soft value record table according to the reference sequence number of the data block, wherein a 0 th bit to an M th bit in binary of a reference sequence number of the at least one first historical demodulated soft value record are the same as a 0 th bit to an M th bit in binary of the reference sequence number of the data block, wherein M is a positive integer greater

Assignees

• Huawei Tech Co Ltd

Inventors

• Yan Kai
• Xue Juhua
• Li Ming

Classifications

• H03M13/09

  Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit · CPC title

• H03M13/4115

  list output Viterbi decoding · CPC title

• H03M13/3746

  with iterative decoding · CPC title

• H03M13/29 Primary

  combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes · CPC title

• H03M13/3769

  using symbol combining, e.g. Chase combining of symbols received twice or more · CPC title