Inrush control with multiple switches
US-2015016005-A1 · Jan 15, 2015 · US
US10283957B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10283957-B2 |
| Application number | US-201615252047-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 30, 2016 |
| Priority date | Aug 31, 2015 |
| Publication date | May 7, 2019 |
| Grant date | May 7, 2019 |
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Devices and methods are provided relating to supplying a load having an inrush-current behavior, e.g. charging of a capacitance e.g. at power up of a circuit. A first load path and a second load path are provided which are used in an alternating manner.
Opening claim text (preview).
What is claimed is: 1. A device, comprising: a first load path configured to be connected between a power supply terminal and a load having an inrush-current behavior, the first load path comprising a first switch, a second load path configured to be connected between the power supply terminal and the load, the second load path comprising a second switch, and a controller configured to alternatingly activate the first switch and the second switch over a plurality of alternating cycles to supply the load during a start-up of the device, wherein alternatingly activating the first switch and the second switch comprises opening and closing the first switch and the second switch. 2. The device of claim 1 , wherein the controller is configured to operate the first switch and the second switch in a saturation region in an on state of the first switch and the second switch, respectively. 3. The device of claim 1 , wherein at least one of the first switch or the second switch comprises a field effect transistor (FET) switch. 4. The device of claim 3 , wherein the FET switch comprises a metal oxide semiconductor FET. 5. The device of claim 1 , further comprising a power supply coupled to the power supply terminal. 6. The device of claim 1 , further comprising the load, the load comprising at least one of a capacitance or a filament. 7. The device of claim 6 , wherein the capacitance comprises at least one of a capacitor or a parasitic capacitance of a device to be supplied by a power supply coupled to the power supply terminal. 8. The device of claim 1 , wherein the controller is configured to control the alternatingly activating of the first switch and the second switch such that closed phases of the first switch and the second switch overlap. 9. The device of claim 1 , wherein the controller is configured to control the alternatingly activating of the first switch and the second switch such that closed phases of the first switch and the second switch are separated by a gap where both the first switch and the second switch are open. 10. The device of claim 1 , wherein a time duration of on states of the first switch and the second switch is determined based on a thermal stability of the first switch and the second switch. 11. A device, comprising: a power source, at least one load having an inrush-current behavior, a first metal oxide semiconductor field effect transistor (MOSFET) coupled between the power source and the at least one load, a second MOSFET coupled in parallel to the first MOSFET between the power source and the at least one load, and a controller configured to apply signals to gate terminals of the first MOSFET and the second MOSFET to alternatingly activate the first MOSFET and the second MOSFET over a plurality of alternating cycles during a start-up of the device, wherein alternatingly activating the first MOSFET and the second MOSFET comprises turning on and off the first MOSFET and the second MOSFET. 12. The device of claim 11 , wherein the first MOSFET and the second MOSFET are operable in a saturation region to limit a load current. 13. The device of claim 11 , wherein the controller is configured to control the first MOSFET and the second MOSFET such that on states of the first MOSFET and the second MOSFET overlap. 14. A method, comprising: providing a first load path between a power supply and at least one load having an inrush-current behavior, providing a second load path between the power supply and the at least one load, and starting up the at least one load, wherein starting up the at least one load comprises alternatingly supplying the at least one load via the first load path and the second load path over a plurality of alternating cycles. 15. The method of claim 14 , wherein the alternatingly supplying the at least one load comprises opening and closing a first switch in the first load path and a second switch in the second load path. 16. The method of claim 15 , wherein the opening and closing the first switch and the second switch comprises controlling the first switch and the second switch such that closed phases of the first switch and the second switch overlap. 17. The method of claim 15 , wherein the opening and closing the first switch and the second switch comprises closing the first switch and the second switch such that the first switch and the second switch operate in a saturation region. 18. The method of claim 15 , wherein the first switch and the second switch comprise field effect transistor (FET) switches, and the alternatingly opening and closing the first switch and the second switch comprises applying pulsed signals to gate terminals of the first switch and the second switch. 19. The method of claim 18 , wherein the pulsed signals have pulse lengths smaller than a maximum length determined by a thermal stability of the FET switches.
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