Integrated circuit for nonlinear data encoding

Patent metadata

Field	Value
Publication number	US-10283032-B2
Application number	US-201615147812-A
Country	US
Kind code	B2
Filing date	May 5, 2016
Priority date	Oct 7, 2015
Publication date	May 7, 2019
Grant date	May 7, 2019

Abstract

A method of image processing, the method including performing linear processing of an input data signal encoded with a nonlinear function to generate a linear representation of the input data signal including linearized image data, and using an integrated circuit to generate a processed linear image by nonlinearly quantizing the linearized image data to generate nonlinear quantized data, generating a memory address based on the nonlinear quantized data, and accessing a lookup table based on the generated memory address.

First claim

What is claimed is:

1. A method of image processing, the method comprising:
performing linear processing of an input data signal encoded with a nonlinear function to generate a linear representation of the input data signal comprising linearized image data;
performing hardware-based processing of data by using an integrated circuit to generate a processed nonlinear image by:
nonlinearly quantizing the linearized image data to generate nonlinear quantized data by mapping a larger number of linearized digital values of the linearized image data to a smaller number of data values corresponding to the nonlinear quantized data, wherein the nonlinearly quantizing the linearized image data comprises:
receiving an input value of the linearized image data;
determining a data block encompassing the linearized image data in which the selected input value lies;
determining an offset corresponding to the determined data block;
determining a block bit shift corresponding to the determined data block;
bit-shifting the input value according to the block bit shift to generate most significant bits;
bit-shifting a boundary slice of an immediately prior data block according to the block bit shift to generate a prior boundary slice offset; and
generating the nonlinear quantized data by summing the most significant bits with the offset and subtracting the prior boundary slice offset;

generating a memory address based on the nonlinear quantized data; and
accessing a lookup table based on the generated memory address, such that a memory overhead associated with the processing of the data by using the mapping is lower than when not using the mapping; and

performing signal processing on the linearized image data to adjust the linearized image data.

2. The method of claim 1 , wherein the input data signal comprises high dynamic range (HDR) data.

3. The method of claim 1 , wherein the nonlinearly quantizing the linearized image data to generate nonlinear quantized data comprises:
performing a nonlinear quantization function on the linearized image data; and
performing a complimentary function that is complimentary to the nonlinear quantization function.

4. The method of claim 1 , wherein the offset corresponds to memory addresses of the lookup table corresponding to input values of data blocks that are lower than the determined data block; and
wherein the method further comprises correcting for out-of-range quantized values within the determined data block.

5. The method of claim 1 , further comprising assigning 2 to 10 data blocks comprising the determined data block.

6. The method of claim 1 , further comprising retrieving a single output value from the lookup table at the memory address for the selected input value.

7. The method of claim 6 , wherein the processed nonlinear image comprises the output value.

8. The method of claim 6 , further comprising:
determining a degree of error for each output value stored in the lookup table; and
adjusting a quantization function corresponding to the nonlinear quantizing such that any look up table entry has an error of less than 1 least significant bit.

9. The method of claim 8 , further comprising determining boundary slice intervals using an optimization procedure to define the data blocks and bit shift levels.

10. The method of claim 1 , further comprising:
mapping the memory address to an output value stored in the lookup table; and
retrieving the output value from the lookup table.

11. A device for nonlinear encoding of linearized image data, the device comprising:
a compressive addressing computation processor for receiving an input value of the linearized image data, for performing a quantization function on the input value, and for performing signal processing on the linearized image data to adjust the linearized image data;
a set of compression registers for delivering, to the compressive addressing computation processor, a memory address corresponding to the input value, wherein the set of compression registers comprise:
a boundary slice register for storing a boundary of a data block of the linearized image data corresponding to the input value;
a block bit shift register for storing a block bit shift corresponding to the data block; and
an offset register for storing an offset corresponding to the data block;

a lookup table for storing an output value at the memory address; and
a memory controller for accessing the lookup table to retrieve the output value,
wherein performing a quantization function on the input value comprises:
determining a data block encompassing the linearized image data in which the selected input value lies;
determining, by the offset register, an offset corresponding to the determined data block;
determining a block bit shift, by the block bit shift register, corresponding to the determined data block;
bit-shifting the input value according to the block bit shift to generate most significant bits;
bit-shifting the boundary of the data bock according to the block bit shift to generate a prior boundary slice offset; and
generating the memory address according to the sum of the most significant bits and the offset minus the prior boundary slice offset.

12. The device of claim 11 , wherein the device for nonlinear encoding of linearized image data comprises an integrated circuit.

13. The device of claim 12 , wherein the integrated circuit comprises only a single memory cell corresponding to the lookup table.

14. The device of claim 13 , wherein the single memory cell is reprogrammable.

15. A method of nonlinear data encoding for performing signal processing on linearized image data to adjust the linearized image data, the method comprising:
generating a memory address based on a linear input value by:
determining a data block in which the linear input value lies;
determining a block bit shift corresponding to the determined data block;
determining an offset corresponding to the determined data block; and
bit-shifting the linear input value according to the block bit shift to generate most significant bits;
bit-shifting a boundary slice of an immediately prior data block according to the block bit shift to generate a prior boundary slice offset;

calculating a memory address of a lookup table, wherein the memory address is equal to the sum of the most significant bits and the offset minus the prior boundary slice offset; and
retrieving a nonlinear value from the lookup table based on the generated memory address.

16. The method of claim 15 , wherein the generating the memory address and the retrieve the nonlinear value comprises using a single integrated circuit.

17. The method of claim 15 , wherein the retrieving the nonlinear value from the lookup table based on the generated memory address comprises:
delivering the generated memory address to a single memory controller on an integrated circuit, and
retrieving the nonlinear value from a single memory cell comprising the lookup table using the memory controller.

Assignees

• Samsung Display Co Ltd

Inventors

• Hoffman David M

Classifications

• G09G2360/16

  Calculation or use of calculated indices related to luminance levels in display data · CPC title

• G09G2320/0276

  for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction · CPC title

• H04N19/126 Primary

  Details of normalisation or weighting functions, e.g. normalisation matrices or variable uniform quantisers · CPC title

• G06F3/14

  Digital output to display device {; Cooperation and interconnection of the display device with other functional units} · CPC title

• G09G3/2003 Primary

  Display of colours (specific for liquid crystal displays G09G3/3607) · CPC title