Image processing apparatus, method of controlling image processing apparatus, and recording medium

Patent metadata

Field	Value
Publication number	US-10282318-B2
Application number	US-201715782693-A
Country	US
Kind code	B2
Filing date	Oct 12, 2017
Priority date	Oct 17, 2016
Publication date	May 7, 2019
Grant date	May 7, 2019

Abstract

An image processing apparatus includes a plurality of memories and a hardware processor which controls an execution operation of a first function including an image processing function and an execution operation of a second function including a server function, by using the plurality of memories. The hardware processor estimates a required bandwidth which is a memory bandwidth required for the execution operation of the first function on the basis of a current operation mode of the image processing apparatus among a plurality of operation modes of the image processing apparatus, and determines a bandwidth securing channel for first function which is a channel capable of being used for the execution operation of the first function and incapable of being used for the execution operation of the second function, out of a plurality of channels used to access the plurality of memories, on the basis of the required bandwidth.

First claim

What is claimed is:

1. An image processing apparatus comprising:
a plurality of memories; and
a hardware processor which controls an execution operation of a first function including an image processing function and an execution operation of a second function including a server function, by using said plurality of memories,
said image processing apparatus capable of operating in any of a plurality of operation modes,
wherein said hardware processor estimates a required bandwidth which is a memory bandwidth required for said execution operation of said first function on the basis of a current operation mode of said image processing apparatus among said plurality of operation modes,
determines and assigns one or more bandwidth securing channels out of a plurality of channels used to access said plurality of memories for said first function, wherein at least one bandwidth securing channel is a channel capable of being used exclusively for said execution operation of said first function and incapable of being used for said execution operation of said second function, on the basis of said required bandwidth,
determines and assigns one or more bandwidth securing channel out of the plurality of channels for said second function, and
executes said first function and said second function in parallel,
wherein, when the required bandwidth does not require said plurality of memories for the first function, the bandwidth securing channel for the second function is distinct from the one or more bandwidth securing channels for said first function,
and wherein, when at least one bandwidth securing channel must be shared between said first function and said second function, an arbitration operation determines a priority of said first function and said second function, and executes said first function and said second function based on the priority.

2. The image processing apparatus according to claim 1 , wherein
said hardware processor changes a channel capable of being used for said execution operation of said first function among a plurality of channels in accordance with a plurality of stages regarding said required bandwidth.

3. The image processing apparatus according to claim 2 , wherein
said hardware processor determines said bandwidth securing channel for first function out of said plurality of channels at least one stage among said plurality of stages regarding said required bandwidth.

4. The image processing apparatus according to claim 3 , wherein
said hardware processor determines said bandwidth securing channel for first function out of said plurality of channels at two or more stages among said plurality of stages regarding said required bandwidth, and
expands said bandwidth securing channel for first function as said required bandwidth becomes larger.

5. The image processing apparatus according to claim 1 , wherein
said hardware processor determines said bandwidth securing channel for first function before starting an execution of a new job regarding said first function.

6. The image processing apparatus according to claim 1 , wherein
after estimation of said required bandwidth, said hardware processor reestimates said required bandwidth on the basis of an actual compression ratio of data compressed in an image compression process regarding said image processing function and redetermines said bandwidth securing channel for first function on the basis of said required bandwidth after being reestimated.

7. The image processing apparatus according to claim 1 , wherein
after estimation of said required bandwidth, said hardware processor reestimates said required bandwidth on the basis of a determination result in an image type determination process regarding said image processing function and redetermines said bandwidth securing channel for first function on the basis of said required bandwidth after being reestimated.

8. A method of controlling an image processing apparatus which controls an execution operation of a first function including an image processing function and an execution operation of a second function including a server function by using a plurality of memories, to perform:
a) estimating a required bandwidth which is a memory bandwidth required for said execution operation of said first function on the basis of a current operation mode of said image processing apparatus among a plurality of operation modes of said image processing apparatus;
b) determining and assigning one or more bandwidth securing channels out of a plurality of channels used to access said plurality of memories for said first function, wherein at least one bandwidth securing channel is a channel capable of being used exclusively for said execution operation of said first function and incapable of being used for said execution operation of said second function, on the basis of said required bandwidth;
c) determining and assigns one or more bandwidth securing channel out of the plurality of channels for said second function; and
d) executing said first function and said second function in parallel,
wherein, when the required bandwidth does not require said plurality of memories for the first function, the bandwidth securing channel for the second function is distinct from the one or more bandwidth securing channels for said first function,
and wherein, when at least one bandwidth securing channel must be shared between said first function and said second function, an arbitration operation determines a priority of said first function and said second function, and executes said first function and said second function based on the priority.

9. A non-transitory computer-readable recording medium for recording therein a computer program which causes a computer controlling said image processing apparatus, to execute the method as defined in claim 8 .

10. An image processing apparatus comprising:
a plurality of memories; and
a hardware processor which controls an execution operation of a first function including an image processing function and an execution operation of a second function including a server function, by using said plurality of memories,
wherein said hardware processor estimates a required bandwidth which is a memory bandwidth required for said execution operation of said first function on the basis of an operation state of a user on said image processing apparatus,
determines and assigns one or more bandwidth securing channels out of a plurality of channels used to access said plurality of memories for said first function, wherein at least one bandwidth securing channel is a channel capable of being used exclusively for said execution operation of said first function and incapable of being used for said execution operation of said second function, on the basis of said required bandwidth,
determines and assigns one or more bandwidth securing channel out of the plurality of channels for said second function, and
executes said first function and said second function in parallel,
wherein, when the required bandwidth does not require said plurality of memories for the first function, the bandwidth securing channel for the second function is distinct from the one or more bandwidth securing channels for said first function,
and wherein, when at least one bandwidth securing channel must be shared between said first function and said second function, an arbitration operation determines a priority of said first function and said second function, and executes said first function and said second function based on the priority.

11. The image processing apparatus according to claim 10 , wherein
said operation state of said user includes any of:
a state where said user approaches said imag

Assignees

• Konica Minolta Inc

Inventors

• Takahashi Kenichi
• Ozawa Kaitaku
• Hosono Masao
• Nakajima Tomoaki
• Kawaguchi Toshikazu
• Nakano Daisuke

Classifications

• G06F13/128

  for dedicated transfers to a network (for protocol converters G06F13/387) · CPC title

• G06F13/1605 Primary

  based on arbitration (arbitration in handling access to a common bus or bus system G06F13/36) · CPC title

• G06F13/4031

  with arbitration · CPC title